 | 2012 |
|---|
| 9 |       | Ruzica Jevtic,
Carlos Carreras:
A complete dynamic power estimation model for data-paths in FPGA DSP designs.
Integration 45(2): 172-185 (2012) |
| 2011 |
|---|
| 8 | | Ruzica Jevtic,
Bojan Jovanovic,
Carlos Carreras:
Power estimation of dividers implemented in FPGAs.
ACM Great Lakes Symposium on VLSI 2011: 313-318 |
| 7 | | Ruzica Jevtic,
Carlos Carreras:
Power Measurement Methodology for FPGA Devices.
IEEE T. Instrumentation and Measurement 60(1): 237-247 (2011) |
| 6 | | Borivoje Nikolic,
Ji-Hoon Park,
Jaehwa Kwak,
Bastien Giraud,
Zheng Guo,
Liang-Teck Pang,
Seng Oon Toh,
Ruzica Jevtic,
Kun Qian,
Costas J. Spanos:
Technology Variability From a Design Perspective.
IEEE Trans. on Circuits and Systems 58-I(9): 1996-2009 (2011) |
| 2010 |
|---|
| 5 | | Ruzica Jevtic,
Carlos Carreras:
Power Estimation of Embedded Multiplier Blocks in FPGAs.
IEEE Trans. VLSI Syst. 18(5): 835-839 (2010) |
| 2009 |
|---|
| 4 | | Ruzica Jevtic,
Carlos Carreras,
Vukasin Pejovic:
Floorplan-based FPGA interconnect power estimation in DSP circuits.
SLIP 2009: 53-60 |
| 2008 |
|---|
| 3 | | Ruzica Jevtic,
Carlos Carreras:
Analytical High-Level Power Model for LUT-Based Components.
PATMOS 2008: 369-378 |
| 2 | | Ruzica Jevtic,
Carlos Carreras,
Domenik Helms:
A Comparison of Approaches for High-Level Power Estimation of LUT-Based DSP Components.
ReConFig 2008: 361-366 |
| 2007 |
|---|
| 1 | | Ruzica Jevtic,
Carlos Carreras,
Gabriel Caffarena:
Switching Activity Models for Power Estimation in FPGA Multipliers.
ARC 2007: 201-213 |
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