Chris R. Jesshope

	2011
61		Qiang Yang, Chris R. Jesshope, Jian Fu: A Micro Threading Based Concurrency Model for Parallel Computing. IPDPS Workshops 2011: 1668-1674
60		Michiel W. van Tol, Roy Bakker, Merijn Verstraaten, Clemens Grelck, Chris R. Jesshope: Efficient Memory Copy Operations on the 48-core Intel SCC Processor. MARC Symposium 2011: 13-18
59		Merijn Verstraaten, Clemens Grelck, Michiel W. van Tol, Roy Bakker, Chris R. Jesshope: Mapping Distributed S-Net on the 48-core Intel SCC processor. MARC Symposium 2011: 41-46
58		M. Irfan Uddin, Michiel W. van Tol, Chris R. Jesshope: High Level Simulation of SVP Many-Core Systems. Parallel Processing Letters 21(4): 413-438 (2011)
	2010
57		Thomas A. M. Bernard, Clemens Grelck, Michael A. Hicks, Chris R. Jesshope, Raphaël Poss: Resource-Agnostic Programming for Many-Core Microgrids. Euro-Par Workshops 2010: 109-116
56		Michael A. Hicks, Michiel W. van Tol, Chris R. Jesshope: Towards scalable I/O on a many-core architecture. ICSAMOS 2010: 341-348
55		Thomas A. M. Bernard, Clemens Grelck, Chris R. Jesshope: On the Compilation of a Language for General Concurrent Target Architectures. Parallel Processing Letters 20(1): 51-69 (2010)
	2009
54		Chris R. Jesshope, Mike Lankamp, Li Zhang: Evaluating CMPs and Their Memory Architecture. ARCS 2009: 246-257
53		Martti Forsell, Peter Hofstee, Ahmed Jerraya, Chris R. Jesshope, Uzi Vishkin, Jesper Larsson Träff: HPPC 2009 Panel: Are Many-Core Computer Vendors on Track? Euro-Par Workshops 2009: 9-15
52		Kostas Bousias, Liang Guang, Chris R. Jesshope, Mike Lankamp: Implementation and evaluation of a microthread architecture. Journal of Systems Architecture - Embedded Systems Design 55(3): 149-161 (2009)
51		Michiel W. van Tol, Chris R. Jesshope, Mike Lankamp, Simon Polstra: An implementation of the SANE Virtual Processor using POSIX threads. Journal of Systems Architecture - Embedded Systems Design 55(3): 162-169 (2009)
50		Chris R. Jesshope, Mike Lankamp, Li Zhang: The implementation of an SVP many-core processor and the evaluation of its memory architecture. SIGARCH Computer Architecture News 37(2): 38-45 (2009)
	2008
49		Thuy Duong Vu, Li Zhang, Chris R. Jesshope: The Verification of the On-Chip COMA Cache Coherence Protocol. AMAST 2008: 413-429
48		Chris R. Jesshope: Building a Concurrency and Resource Allocation Model into a Processor's ISA. Euro-Par Workshops 2008: 129-130
47		Thomas A. M. Bernard, Kostas Bousias, Liang Guang, Chris R. Jesshope, Mike Lankamp, Michiel W. van Tol, Li Zhang: A general model of concurrency and its implementation as many-core dynamic RISC processors. ICSAMOS 2008: 1-9
46		Chris R. Jesshope: Introduction to Programming Multicores. SAMOS 2008: 207
45		Chris R. Jesshope, Jean-Marc Philippe, Michiel W. van Tol: An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency. SAMOS 2008: 218-228
44		Chris R. Jesshope: Operating Systems in silicon and the Dynamic Management of Resources in Many-Core Chips. Parallel Processing Letters 18(2): 257-274 (2008)
	2007
43		Keqiu Li, Chris R. Jesshope, Hai Jin, Jean-Luc Gaudiot: Network and Parallel Computing, IFIP International Conference, NPC 2007, Dalian, China, September 18-21, 2007, Proceedings Springer 2007
42		Nabil Hasasneh, Ian Bell, Chris R. Jesshope: High Level Modelling and Design For a Microthreaded Scheduler to Support Microgrids. AICCSA 2007: 301-308
41		Li Zhang, Chris R. Jesshope: On-Chip COMA Cache-Coherence Protocol for Microgrids of Microthreaded Cores. Euro-Par Workshops 2007: 38-48
40		Thuy Duong Vu, Chris R. Jesshope: Formalizing SANE Virtual Processor in Thread Algebra. ICFEM 2007: 345-365
39		Thomas A. M. Bernard, Chris R. Jesshope, Peter M. W. Knijnenburg: Strategies for Compiling µ TC to Novel Chip Multiprocessors. SAMOS 2007: 127-138
38		Nabil Hasasneh, Ian Bell, Chris R. Jesshope: Asynchronous arbiter for micro-threaded chip multiprocessors. Journal of Systems Architecture 53(5-6): 253-262 (2007)
	2006
37		Chris R. Jesshope, Colin Egan: Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings Springer 2006
36		Nabil Hasasneh, Ian Bell, Chris R. Jesshope: Scalable and Partitionable Asynchronous Arbiter for Micro-threaded Chip Multiprocessors. ARCS 2006: 252-267
35		Chris R. Jesshope: muTC - An Intermediate Language for Programming Chip Multiprocessors. Asia-Pacific Computer Systems Architecture Conference 2006: 147-160
34		Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope: Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors. Comput. J. 49(2): 211-233 (2006)
33		Chris R. Jesshope, Alexander V. Shafarenko: Special issue on Micro-grids - Guest Editor Introduction. International Journal of Parallel Programming 34(3): 189-192 (2006)
32		Chris R. Jesshope, Alexander V. Shafarenko: Guest Editor's Introduction (Part 2). International Journal of Parallel Programming 34(4): 319-322 (2006)
31		Ian Bell, Nabil Hasasneh, Chris R. Jesshope: Supporting Microthread Scheduling and Synchronisation in CMPs. International Journal of Parallel Programming 34(4): 343-381 (2006)
30		Chris R. Jesshope: Microthreading a Model for Distributed Instruction-level Concurrency. Parallel Processing Letters 16(2): 209-228 (2006)
	2005
29		Kostas Bousias, Chris R. Jesshope: The Challenges of Massive On-Chip Concurrency. Asia-Pacific Computer Systems Architecture Conference 2005: 157-170
	2004
28		Chris R. Jesshope: Microgrids - The exploitation of massive on-chip concurrency. High Performance Computing Workshop 2004: 203-223
27		Lipeng Wen, Chris R. Jesshope: A General Learning Management System Based on Schema-driven Methodology. ICALT 2004: 0-
26		Chris R. Jesshope: Scalable Instruction-Level Parallelism.. SAMOS 2004: 383-392
	2003
25		Chris R. Jesshope: Multi-threaded Microprocessors - Evolution or Revolution. Asia-Pacific Computer Systems Architecture Conference 2003: 21-45
24		Lipeng Wen, Chris R. Jesshope: Web Services Technology and Learning Technology- A Web-Services Model for Constructing Decentralized Virtual Learning Environments. ICWS 2003: 507-514
	2001
23		Chris R. Jesshope: Implementing an efficient vector instruction set in a chip multi-processor using micro-threaded pipelines. ACSAC 2001: 80-88
22		Ramón Beivide, Chris R. Jesshope, Antonio Robles, Cruz Izu: Topic 12: Routing and Communication in Interconnection Networks. Euro-Par 2001: 611-612
21		Regina Gehne, Chris R. Jesshope, Zhenzi Zhang: Technology Integrated Learning Environment - A Web-based Distance Learning System. IMSA 2001: 1-6
20		Hong Hong, Neena Albi, Kinshuk, Xiaoqin He, Ashok Patel, Chris R. Jesshope: Adaptivity in Web-based Educational System. WWW Posters 2001
19		Chris R. Jesshope: Cost-Effective Multimedia in On-line Teaching. Educational Technology & Society 4(3): (2001)
	2000
18		Chris R. Jesshope, Bing Luo: Micro-Threading: A New Approach to Future RISC. ACAC 2000: 34-41
	1999
17		Chris R. Jesshope: Parallel Computer Architecture - What Is Its Future? Introduction. Euro-Par 1999: 695-697
16		Chris R. Jesshope: Computers as Tutors: Solving the Crisis in Education. Educational Technology & Society 2(4): (1999)
	1998
15		Murray Pearson, Chris R. Jesshope: Multi-campus teaching using computer networks. ACSE 1998: 106-111
	1997
14		Chris R. Jesshope: Web based teaching: a minimalist approach. ACSE 1997: 16-23
13		Julian A. B. Dines, John F. Snowdon, Marc P. Y. Desmulliez, Dima B. Barsky, Alexander V. Shafarenko, Chris R. Jesshope: Optical Interconnectivity in a Scalable Data-Parallel System. J. Parallel Distrib. Comput. 41(1): 120-130 (1997)
	1996
12		Julian A. B. Dines, John F. Snowdon, Marc P. Y. Desmulliez, D. T. Nielson, Dima B. Barsky, Alexander V. Shafarenko, Chris R. Jesshope: Optical Interconnection hardware for scalable systems. PDPTA 1996: 367-374
	1994
11		Chris R. Jesshope, Vesselin Jossifov, Wolfgang Wilhelmi: Parcella 1994, VI. International Workshop on Parallel Processing by Cellular Automata and Arrays, Potsdam, September 21-23, 1994. Proceedings Akademie Verlag, Berlin 1994
	1993
10		Chris R. Jesshope, Cruz Izu: The MP1 Network Chip and its Application to Parallel Computers. Comput. J. 36(8): 763-777 (1993)
9		Cruz Izu, Ramón Beivide, Chris R. Jesshope, Agustin Arruabarrena: Experimental evaluation of Mad Postman bidimensional routing networks. Microprocessing and Microprogramming 38(1-5): 33-41 (1993)
8		Chris R. Jesshope: Latency Reduction in VLSI Routers. Parallel Processing Letters 3: 485-494 (1993)
	1991
7		Vladimir Getov, Chris R. Jesshope: Simulation Facility of Distributed Memory System with "Mad Postman" Communication Network. EDMCC 1991: 224-233
	1989
6		Chris R. Jesshope, P. R. Miller, Jay T. Yantchev: High Performance Communications in Processor Networks. ISCA 1989: 150-157
	1988
5		Chris R. Jesshope, Philip Miller, Jelio Yantchev: Programming with active data. Parcella 1988: 111-129
4		Chris R. Jesshope: Transputers and switches as objects in OCCAM. Parallel Computing 8(1-3): 19-30 (1988)
	1985
3		Chris R. Jesshope, M. J. Crawley, G. L. Lovegrove: An Intelligent Pascal Editor for a Graphical Oriented Workstation. Softw., Pract. Exper. 15(11): 1103-1119 (1985)
	1980
2		Chris R. Jesshope: The Implementation of Fast Radix 2 Transforms on Array Processors. IEEE Trans. Computers 29(1): 20-27 (1980)
1		Chris R. Jesshope: Some Results Concerning Data Routing in Array Processors. IEEE Trans. Computers 29(7): 659-662 (1980)

Coauthor Index

1	Neena Albi	[20]
2	Agustin Arruabarrena	[9]
3	Roy Bakker	[59] [60]
4	Dima B. Barsky	[12] [13]
5	Ramón Beivide	[9] [22]
6	Ian Bell	[31] [36] [38] [42]
7	Thomas A. M. Bernard	[39] [47] [55] [57]
8	Kostas Bousias	[29] [34] [47] [52]
9	M. J. Crawley	[3]
10	Marc P. Y. Desmulliez	[12] [13]
11	Julian A. B. Dines	[12] [13]
12	Colin Egan	[37]
13	Martti Forsell	[53]
14	Jian Fu	[61]
15	Jean-Luc Gaudiot	[43]
16	Regina Gehne	[21]
17	Vladimir Getov	[7]
18	Clemens Grelck	[55] [57] [59] [60]
19	Liang Guang	[47] [52]
20	Nabil Hasasneh	[31] [34] [36] [38] [42]
21	Xiaoqin He	[20]
22	Michael A. Hicks	[56] [57]
23	Peter Hofstee	[53]
24	Hong Hong	[20]
25	Cruz Izu	[9] [10] [22]
26	Ahmed Jerraya	[53]
27	Hai Jin	[43]
28	Vesselin Jossifov	[11]
29	Kinshuk	[20]
30	Peter M. W. Knijnenburg	[39]
31	Mike Lankamp	[47] [50] [51] [52] [54]
32	Keqiu Li	[43]
33	G. L. Lovegrove	[3]
34	Bing Luo	[18]
35	P. R. Miller	[6]
36	Philip Miller	[5]
37	D. T. Nielson	[12]
38	Ashok Patel	[20]
39	Murray Pearson	[15]
40	Jean-Marc Philippe	[45]
41	Simon Polstra	[51]
42	Raphaël Poss	[57]
43	Antonio Robles	[22]
44	Alexander V. Shafarenko	[12] [13] [32] [33]
45	John F. Snowdon	[12] [13]
46	Michiel W. van Tol	[45] [47] [51] [56] [58] [59] [60]
47	Jesper Larsson Träff	[53]
48	M. Irfan Uddin	[58]
49	Merijn Verstraaten	[59] [60]
50	Uzi Vishkin	[53]
51	Thuy Duong Vu	[40] [49]
52	Lipeng Wen	[24] [27]
53	Wolfgang Wilhelmi	[11]
54	Qiang Yang	[61]
55	Jay T. Yantchev	[6]
56	Jelio Yantchev	[5]
57	Li Zhang	[41] [47] [49] [50] [54]
58	Zhenzi Zhang	[21]

Colors in the list of coauthors

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