Axel Jantsch

	2012
144		Shaoteng Liu, Axel Jantsch, Zhonghai Lu: Parallel probing: Dynamic and constant time setup procedure in circuit switching NoC. DATE 2012: 1289-1294
143		Fahimeh Jafari, Axel Jantsch, Zhonghai Lu: Worst-case delay analysis of Variable Bit-Rate flows in network-on-chip with aggregate scheduling. DATE 2012: 538-541
142		Syed M. A. H. Jafri, Liang Guang, Axel Jantsch, Kolin Paul, Ahmed Hemani, Hannu Tenhunen: Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation. PECCS 2012: 450-458
141		Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang, Xianju Yang: Support Efficient and Fault-Tolerant Multicast in Bufferless Network-on-Chip. IEICE Transactions 95-D(4): 1052-1061 (2012)
140		Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang: A 1-Cycle 1.25 GHz Bufferless Router for 3D Network-on-Chip. IEICE Transactions 95-D(5): 1519-1522 (2012)
139		Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng: Performance Analysis of Flow-Based Traffic Splitting Strategy on Cluster-Mesh Sensor Networks. IJDSN 2012: (2012)
	2011
138		Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch: FPGA-Based Cherenkov Ring Recognition in Nuclear and Particle Physics Experiments. ARC 2011: 169-180
137		Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jantsch: Realization and performance comparison of sequential and weak memory consistency models in network-on-chip based multi-core systems. ASP-DAC 2011: 154-159
136		Wenmin Hu, Zhonghai Lu, Axel Jantsch, Hengzhu Liu: Power-efficient tree-based multicast support for Networks-on-Chip. ASP-DAC 2011: 363-368
135		Abdul Naeem, Axel Jantsch, Xiaowen Chen, Zhonghai Lu: Realization and Scalability of Release and Protected Release Consistency Models in NoC Based Systems. DSD 2011: 47-54
134		Matthew Grange, Axel Jantsch, Roshan Weerasekera, Dinesh Pamunuwa: Modeling the computational efficiency of 2-D and 3-D silicon processors for early-chip planning. ICCAD 2011: 310-317
133		Fahimeh Jafari, Axel Jantsch, Zhonghai Lu: Output process of variable bit-rate flows in on-chip networks based on aggregate scheduling. ICCD 2011: 445-446
132		Chaochao Feng, Minxuan Zhang, Jinwen Li, Jiang Jiang, Zhonghai Lu, Axel Jantsch: A Low-Overhead Fault-Aware Deflection Routing Algorithm for 3D Network-on-Chip. ISVLSI 2011: 19-24
131		Matt Grange, Roshan Weerasekera, Dinesh Pamunuwa, Axel Jantsch, Awet Yemane Weldezion: Optimal network architectures for minimizing average distance in k-ary n-dimensional mesh networks. NOCS 2011: 57-64
130		Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng: Stochastic coverage in event-driven sensor networks. PIMRC 2011: 915-919
129		Meganathan Deivasigamani, Shaghayeghsadat Tabatabaei, Naveed Mustafa, Hamza Ijaz, Haris Bin Aslam, Shaoteng Liu, Axel Jantsch: Concept and design of exhaustive-parallel search algorithm for Network-on-Chip. SoCC 2011: 150-155
128		Wenmin Hu, Zhonghai Lu, Axel Jantsch, Hengzhu Liu, Botao Zhang, Dongpei Liu: Network-on-Chip multicasting with low latency path setup. VLSI-SoC 2011: 290-295
127		Dinesh Pamunuwa, Matthew Grange, Roshan Weerasekera, Axel Jantsch: 3-D integration and the limits of silicon computation. VLSI-SoC 2011: 343-348
126		Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng: Modeling and analysis of Rayleigh fading channels using stochastic network calculus. WCNC 2011: 1056-1061
125		Ming Liu, Wolfgang Kuehn, S. Lange, Shuo Yang, J. Roskoss, Zhonghai Lu, Axel Jantsch, Qiang Wang, Hao Xu, Dapeng Jin: A High-End Reconfigurable Computation Platform for Nuclear and Particle Physics Experiments. Computing in Science and Engineering 13(2): 52-63 (2011)
124		Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Zhonghai Lu, Dimitrios Soudris, Axel Jantsch: Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations. Embedded Systems Letters 3(2): 66-69 (2011)
123		Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch: FPGA-Based Particle Recognition in the HADES Experiment. IEEE Design & Test of Computers 28(4): 48-57 (2011)
122		Xiaowen Chen, Shuming Chen, Zhonghai Lu, Axel Jantsch: Hybrid Distributed Shared Memory Space in Multi-core Processors. JSW 6(12): 2369-2378 (2011)
	2010
121		Jun Zhu, Ingo Sander, Axel Jantsch: Constrained global scheduling of streaming applications on MPSoCs. ASP-DAC 2010: 223-228
120		Jun Zhu, Ingo Sander, Axel Jantsch: Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs. DATE 2010: 1035-1040
119		Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohammad Hossien Yaghmaee: Optimal regulation of traffic flows in networks-on-chip. DATE 2010: 1621-1624
118		Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen: Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller. DATE 2010: 39-44
117		Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch: FPGA-based adaptive computing for correlated multi-stream processing. DATE 2010: 973-976
116		Amr Helmy, Laurence Pierre, Axel Jantsch: Theorem proving techniques for the formal verification of NoC communications with non-minimal adaptive routing. DDECS 2010: 221-224
115		Jun Zhu, Ingo Sander, Axel Jantsch: HetMoC: Heterogeneous Modelling in SystemC. FDL 2010: 117-122
114		Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jantsch: Scalability of weak consistency in NoC based multicore architectures. ISCAS 2010: 3497-3500
113		Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Jianzhuang Lu, Hucheng Wu: Supporting Efficient Synchronization in Multi-core NoCs Using Dynamic Buffer Allocation Technique. ISVLSI 2010: 462-463
112		Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin: Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. ISVLSI 2010: 518-523
111		Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch: Inter-process Communication Using Pipes in FPGA-Based Adaptive Computing. ISVLSI 2010: 80-85
110		Zhipeng Chen, Axel Jantsch: A Worst Case Performance Model for TDM Virtual Circuit in NoCs. NPC 2010: 452-461
109		Chaochao Feng, Zhonghai Lu, Axel Jantsch, Jinwen Li, Minxuan Zhang: FoN: Fault-on-Neighbor aware routing algorithm for Networks-on-Chip. SoCC 2010: 441-446
108		Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen: Handling shared variable synchronization in multi-core Network-on-Chips with distributed memory. SoCC 2010: 467-472
107		Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohammad Hossien Yaghmaee: Buffer Optimization in Network-on-Chip Through Flow Regulation. IEEE Trans. on CAD of Integrated Circuits and Systems 29(12): 1973-1986 (2010)
106		Radu Marculescu, Axel Jantsch: Guest Editorial: Special Section on the ACM/IEEE Symposium on Networks-on-Chip 2009. IEEE Trans. on CAD of Integrated Circuits and Systems 29(6): 853-854 (2010)
	2009
105		Matt Grange, Awet Yemane Weldezion, Dinesh Pamunuwa, Roshan Weerasekera, Zhonghai Lu, Axel Jantsch, Dave Shippen: Physical mapping and performance study of a multi-clock 3-Dimensional Network-on-Chip mesh. 3DIC 2009: 1-7
104		Mikael Millberg, Axel Jantsch: Priority based forced requeue to reduce worst-case latencies for bursty traffic. DATE 2009: 1070-1075
103		Jun Zhu, Ingo Sander, Axel Jantsch: Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures. DATE 2009: 1506-1511
102		Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alistair C. Bruce, Pieter van der Wolf, Tomas Henriksson: Flow regulation for on-chip communication. DATE 2009: 578-581
101		Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch: Run-time Partial Reconfiguration speed investigation and architectural design space exploration. FPL 2009: 498-502
100		Ingo Sander, Jun Zhu, Axel Jantsch, Andreas Herrholz, Philipp A. Hartmann, Wolfgang Nebel: High-level estimation and trade-off analysis for adaptive real-time systems. IPDPS 2009: 1-4
99		Awet Yemane Weldezion, Matt Grange, Dinesh Pamunuwa, Zhonghai Lu, Axel Jantsch, Roshan Weerasekera, Hannu Tenhunen: Scalability of network-on-chip communication architecture for 3-D meshes. NOCS 2009: 114-123
98		Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Shuo Yang, Axel Jantsch: A Reconfigurable Design Framework for FPGA Adaptive Computing. ReConFig 2009: 439-444
97		Zhonghai Lu, Dimitris Brachos, Axel Jantsch: A flow regulator for On-Chip Communication. SoCC 2009: 151-154
96		Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, Li-Rong Zheng: Analytical Evaluation of Retransmission Schemes in Wireless Sensor Networks. VTC Spring 2009
95		Abdul Naeem, Xiaowen Chen, Zhonghai Lu, Axel Jantsch: Scalability of relaxed consistency models in NoC based multicore architectures. SIGARCH Computer Architecture News 37(5): 8-15 (2009)
	2008
94		Eugenio Villar, Axel Jantsch, Christoph Grimm, Tim Kogel: Heterogeneous System-level Specification Using SystemC. DATE 2008
93		Zhonghai Lu, Lei Xia, Axel Jantsch: Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip. DDECS 2008: 92-97
92		Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch: System-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments. DSD 2008: 599-605
91		Jun Zhu, Ingo Sander, Axel Jantsch: Energy efficient streaming applications with guaranteed throughput on MPSoCs. EMSOFT 2008: 119-128
90		Jun Zhu, Ingo Sander, Axel Jantsch: Performance analysis of reconfiguration in adaptive real-time streaming applications. ESTImedia 2008: 53-58
89		Ming Liu, Johannes Lang, Shuo Yang, Tiago Perez, Wolfgang Kuehn, Hao Xu, Dapeng Jin, Qiang Wang, Lu Li, Zhen'An Liu, Zhonghai Lu, Axel Jantsch: ATCA-based computation platform for data acquisition and triggering in particle physics experiments. FPL 2008: 287-292
88		Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev: A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: ECG prototype architectural design space exploration. ACM Trans. Design Autom. Electr. Syst. 13(2): (2008)
87		Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch: SML-Sys: a functional framework with multiple models of computation for modeling heterogeneous system. Design Autom. for Emb. Sys. 12(1-2): 1-30 (2008)
86		Christoph Grimm, Axel Jantsch, Sandeep Kumar Shukla, Eugenio Villar: C-Based Design of Heterogeneous Embedded Systems. EURASIP J. Emb. Sys. 2008: (2008)
85		Ingo Sander, Axel Jantsch: Modelling Adaptive Systems in ForSyDe. Electr. Notes Theor. Comput. Sci. 200(2): 39-54 (2008)
84		Tiberiu Seceleanu, Axel Jantsch: Modeling Communication with Synchronized Environments. Fundam. Inform. 86(3): 343-369 (2008)
83		Zhonghai Lu, Axel Jantsch: TDM Virtual-Circuit Configuration for Network-on-Chip. IEEE Trans. VLSI Syst. 16(8): 1021-1034 (2008)
82		Tarvo Raudvere, Ingo Sander, Axel Jantsch: Application and Verification of Local Nonsemantic-Preserving Transformations in System Design. IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1091-1103 (2008)
81		Arseni Vitkovski, Axel Jantsch, Robert Lauter, Raimo Haukilahti, Erland Nilsson: Low-power and error protection coding for network-on-chip traffic. IET Computers & Digital Techniques 2(6): 483-492 (2008)
	2007
80		Tarvo Raudvere, Ingo Sander, Axel Jantsch: A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops. ACM Great Lakes Symposium on VLSI 2007: 353-358
79		Tarvo Raudvere, Ingo Sander, Axel Jantsch: Synchronization after design refinements with sensitive delay elements. CODES+ISSS 2007: 21-26
78		Iyad Al Khatib, Davide Bertozzi, Axel Jantsch, Luca Benini: Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions. CODES+ISSS 2007: 217-226
77		Zhonghai Lu, Ming Liu, Axel Jantsch: Layered Switching for Networks on Chip. DAC 2007: 122-127
76		Mikael Millberg, Axel Jantsch: Increasing NoC Performance and Utilisation using a Dual Packet Exit Strategy. DSD 2007: 511-518
75		Tomas Henriksson, Pieter van der Wolf, Axel Jantsch, Alistair C. Bruce: Network Calculus Applied to Verification of Memory Access Performance in SoCs. ESTImedia 2007: 21-26
74		Huimin She, Zhonghai Lu, Axel Jantsch, Li-Rong Zheng, Dian Zhou: Traffic Splitting with Network Calculus for Mesh Sensor Networks. FGCN (2) 2007: 368-373
73		Andreas Herrholz, Frank Oppenheimer, Philipp A. Hartmann, Andreas Schallenberg, Wolfgang Nebel, Christoph Grimm, Markus Damm, Jan Haase, F. Brame, Fernando Herrera, Eugenio Villar, Ingo Sander, Axel Jantsch, Anne-Marie Fouilliart, Marcos Martínez: The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems. FPL 2007: 396-401
72		Zhonghai Lu, Axel Jantsch: Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip. ICCAD 2007: 18-25
71		Zhonghai Lu, Jonas Sicking, Ingo Sander, Axel Jantsch: Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures. IEEE International Workshop on Rapid System Prototyping 2007: 143-149
70		Cristian Grecu, André Ivanov, Partha Pratim Pande, Axel Jantsch, Erno Salminen, Ümit Y. Ogras, Radu Marculescu: Towards Open Network-on-Chip Benchmarks. NOCS 2007: 205
69		Per Badlund, Axel Jantsch: An Analytical Approach for Dimensioning Mixed Traffic Networks. NOCS 2007: 215
68		Mikael Millberg, Axel Jantsch: A Study of NoC Exit Strategies. NOCS 2007: 217
67		Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch: EWD: A metamodeling driven customizable multi-MoC system modeling framework. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
66		Erik Jan Marinissen, Axel Jantsch, Nicola Nicolici: DATE 07 workshop on diagnostic services in NoCs. IEEE Design & Test of Computers 24(5): 510 (2007)
65		Zhonghai Lu, Axel Jantsch: Admitting and ejecting flits in wormhole-switched networks on chip. IET Computers & Digital Techniques 1(5): 546-556 (2007)
64		Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson: Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology. T. HiPEAC 1: 239-258 (2007)
	2006
63		Zhonghai Lu, Mingchen Zhong, Axel Jantsch: Evaluation of on-chip networks using deflection routing. ACM Great Lakes Symposium on VLSI 2006: 296-301
62		Tiberiu Seceleanu, Axel Jantsch: Communicating with Synchronized Environments. ACSD 2006: 15-24
61		Axel Jantsch: Models of Computation for Networks on Chip. ACSD 2006: 165-178
60		Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, Sven Jonsson: MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis. Conf. Computing Frontiers 2006: 21-28
59		Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Mohamed Bechara, Hasan Khalifeh, Axel Jantsch, Rustam Nabiev: A multiprocessor system-on-chip for real-time biomedical monitoring and analysis: architectural design space exploration. DAC 2006: 125-130
58		Zhonghai Lu, Ingo Sander, Axel Jantsch: Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication. DSD 2006: 37-44
57		Guang Liang, Axel Jantsch: Adaptive Power Management for the On-Chip Communication Network. DSD 2006: 649-656
56		Sandro Penolazzi, Axel Jantsch: A High Level Power Model for the Nostrum NoC. DSD 2006: 673-676
55		Rikard Thid, Ingo Sander, Axel Jantsch: Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads. DSD 2006: 681-688
54		Zhonghai Lu, Bei Yin, Axel Jantsch: Connection-oriented Multicasting in Wormhole-switched Networks on Chip. ISVLSI 2006: 205-2110
53		Weixing Wang, Axel Jantsch: An algorithm for electing cluster heads based on maximum residual energy. IWCMC 2006: 1465-1470
	2005
52		Petru Eles, Axel Jantsch, Reinaldo A. Bergamaschi: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2005, Jersey City, NJ, USA, September 19-21, 2005 ACM 2005
51		Zhonghai Lu, Axel Jantsch, Ingo Sander: Feasibility analysis of messages for on-chip networks using wormhole routing. ASP-DAC 2005: 960-964
50		Deepak Mathaikutty, Hiren D. Patel, Sandeep K. Shukla, Axel Jantsch: Modelling Environment for Heterogeneous Systems based on MoCs. FDL 2005: 291-303
49		Zhonghai Lu, Ingo Sander, Axel Jantsch: Refinement of Perfectly Synchronous Communication Model. FDL 2005: 453-465
48		Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch: System level verification of digital signal processing applications based on the polynomial abstraction technique. ICCAD 2005: 285-290
47		Axel Jantsch, Robert Lauter, Arseni Vitkovski: Power analysis of link level and end-to-end data protection in networks on chip. ISCAS (2) 2005: 1770-1773
46		Zhonghai Lu, Axel Jantsch: Traffic Configuration for Evaluating Networks on Chips. IWSOC 2005: 535-540
	2004
45		Alex Orailoglu, Pai H. Chou, Petru Eles, Axel Jantsch: Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2004, Stockholm, Sweden, September 8-10, 2004 ACM 2004
44		Abhijit K. Deb, Axel Jantsch, Johnny Öberg: System design for DSP applications in transaction level modeling paradigm. DAC 2004: 466-471
43		Abhijit K. Deb, Axel Jantsch, Johnny Öberg: System Design for DSP Applications Using the MASIC Methodology. DATE 2004: 630-635
42		Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, Axel Jantsch: Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits. DATE 2004: 690-691
41		Mikael Millberg, Erland Nilsson, Rikard Thid, Axel Jantsch: Guaranteed Bandwidth Using Looped Containers in Temporally Disjoint Networks within the Nostrum Network on Chip. DATE 2004: 890-895
40		Mikael Millberg, Erland Nilsson, Rikard Thid, Shashi Kumar, Axel Jantsch: The Nostrum Backbone - a Communication Protocol Stack for Networks on Chip. VLSI Design 2004: 693-696
39		Ingo Sander, Axel Jantsch: System modeling and transformational design refinement in ForSyDe [formal system design]. IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 17-32 (2004)
38		Dinesh Pamunuwa, Johnny Öberg, Li-Rong Zheng, Mikael Millberg, Axel Jantsch, Hannu Tenhunen: A study on the implementation of 2-D mesh-based networks-on-chip in the nanometre regime. Integration 38(1): 3-17 (2004)
37		Axel Jantsch, Johnny Öberg, Hannu Tenhunen: Special issue on networks on chip. Journal of Systems Architecture 50(2-3): 61-63 (2004)
	2003
36		Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, Axel Jantsch: Verification of design decisions in ForSyDe. CODES+ISSS 2003: 176-181
35		Heiko Zimmer, Axel Jantsch: A fault model notation and error-control scheme for switch-to-switch buses in a network-on-chip. CODES+ISSS 2003: 188-193
34		Ingo Sander, Axel Jantsch, Zhonghai Lu: Development and Application of Design Transformations in ForSyDe. DATE 2003: 10364-10369
33		Abhijit K. Deb, Johnny Öberg, Axel Jantsch: Simulation and Analysis of Embedded DSP Systems Using MASIC Methodology. DATE 2003: 11100-11101
32		Erland Nilsson, Mikael Millberg, Johnny Öberg, Axel Jantsch: Load Distribution with the Proximity Congestion Awareness in a Network on Chip. DATE 2003: 11126-11127
31		Axel Jantsch: NoCs: A new Contract between Hardware and Software. DSD 2003: 10-16
30		Abhijit K. Deb, Johnny Öberg, Axel Jantsch: Simulation and Analysis of Embedded DSP Systems Using Petri Nets. IEEE International Workshop on Rapid System Prototyping 2003: 64-70
29		Juha-Pekka Soininen, Axel Jantsch, Martti Forsell, Antti Pelkonen, Jari Kreku, Shashi Kumar: Extending Platform-Based Design to Network on Chip Systems. VLSI Design 2003: 401-
28		Dinesh Pamunuwa, Johnny Öberg, Li-Rong Zheng, Mikael Millberg, Axel Jantsch: Layout, Performance and Power Trade-Offs in Mesh-Based Network-on-Chip Architectures. VLSI-SOC 2003: 362-
	2002
27		Per Bjuréus, Mikael Millberg, Axel Jantsch: FPGA resource and timing estimation from Matlab execution traces. CODES 2002: 31-36
26		Ingo Sander, Axel Jantsch: Transformation based communication and clock domain refinement for system design. DAC 2002: 281-286
25		Ingo Sander, Axel Jantsch, Zhonghai Lu: A Case Study of Hardware and Software Synthesis in ForSyDe. ISSS 2002: 86-91
24		Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnny Öberg, Juha-Pekka Soininen, Martti Forsell, Kari Tiensyrjä, Ahmed Hemani: A Network on Chip Architecture and Design Methodology. ISVLSI 2002: 117-124
	2001
23		Axel Jantsch, Ingo Sander, Wenbiao Wu: The usage of stochastic processes in embedded system specifications. CODES 2001: 5-10
22		Abhijit K. Deb, Johnny Öberg, Axel Jantsch: Control and communication performance analysis of embedded DSP systems in the MASIC methodology. ISSS 2001: 274-273
21		Per Bjuréus, Axel Jantsch: Performance analysis with confidence intervals for embedded software processes. ISSS 2001: 45-50
20		Mattias O'Nils, Axel Jantsch: Device Driver and DMA Controller Synthesis from HW /SW Communication Protocol Specifications. Design Autom. for Emb. Sys. 6(2): 177-205 (2001)
19		Per Bjuréus, Axel Jantsch: Modeling of mixed control and dataflow systems in MASCOT. IEEE Trans. VLSI Syst. 9(5): 690-703 (2001)
18		Johnny Öberg, Mattias O'Nils, Axel Jantsch, Adam Postula, Ahmed Hemani: Grammar-based design of embedded systems. Journal of Systems Architecture 47(3-4): 225-240 (2001)
	2000
17		Axel Jantsch, Ingo Sander: On the roles of functions and objects in system specification. CODES 2000: 8-12
16		Axel Jantsch, Per Bjuréus: Composite Signal Flow: A Computational Model Combining Events, Sampled Streams, and Vectors. DATE 2000: 154-160
15		Per Bjuréus, Axel Jantsch: MASCOT: A Specification and Cosimulation Method Integrating Data and Control Flow. DATE 2000: 161-168
14		Johan Ditmar, Kjell Torkelsson, Axel Jantsch: A Dynamically Reconfigurable FPGA-Based Content Addressable Memory for Internet Protocol Characterization. FPL 2000: 19-28
13		Axel Jantsch, Johann Notbauer, Thomas W. Albrecht: Functional Validation of Mixed Hardware/Software Systems based on Specification, Partitioning, and Simulation of Test Cases. Design Autom. for Emb. Sys. 5(1): 83-113 (2000)
12		Axel Jantsch, Shashi Kumar, Ahmed Hemani: A Metamodel for Studying Concepts in Electronic System Design. IEEE Design & Test of Computers 17(3): 78-85 (2000)
	1999
11		Ingo Sander, Axel Jantsch: System synthesis utilizing a layered functional model. CODES 1999: 136-140
10		Axel Jantsch, Shashi Kumar, Ahmed Hemani: The Rugby Model: A Conceptual Frame for the Study of Modelling, Analysis and Synthesis Concepts of Electronic Systems. DATE 1999: 256-262
9		Mattias O'Nils, Axel Jantsch: Operating System Sensitive Device Driver Synthesis from Implementation Independent Protocol Specification. DATE 1999: 562-567
8		Mattias O'Nils, Axel Jantsch: Synthesis of DMA Controllers from Architecture Independent Descriptions of HW/SW Communication Protocols. VLSI Design 1999: 138-145
7		Ingo Sander, Axel Jantsch: Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons. VLSI Design 1999: 318-323
	1998
6		Mattias O'Nils, Johnny Öberg, Axel Jantsch: Grammar Based Modelling and Synthesis of Device Drivers and Bus Interfaces. EUROMICRO 1998: 10055-10058
5		Johnny Öberg, Axel Jantsch, Anshul Kumar: An Object-Oriented Concept for Intelligent Library Functions. VLSI Design 1998: 355-358
	1996
4		Johnny Öberg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani: A Rule-Based Approach for Improving Allocation of Filter Structures in HLS. VLSI Design 1996: 133-139
3		Bengt Svantesson, Ahmed Hemani, Peeter Ellervee, Adam Postula, Johnny Öberg, Axel Jantsch, Hannu Tenhunen: A Novell Allocation Strategy for Control and Memory Intensive Telecommunication Circiuts. VLSI Design 1996: 23-28
	1994
2		Axel Jantsch, Peeter Ellervee, Ahmed Hemani, Johnny Öberg, Hannu Tenhunen: Hardware/software partitioning and minimizing memory interface traffic. EURO-DAC 1994: 226-231
1		Jouni Isoaho, Axel Jantsch, Hannu Tenhunen: DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques. FPL 1994: 318-320

Coauthor Index

1	Sylvain Aguirre	[112]
2	Thomas W. Albrecht	[13]
3	Iraklis Anagnostopoulos	[112] [124]
4	Haris Bin Aslam	[129]
5	Per Badlund	[69]
6	Alexandros Bartzas	[112] [124]
7	Mohamed Bechara	[59] [60] [64] [88]
8	Dimitris Bekiaris	[112]
9	Luca Benini	[59] [60] [64] [78] [88]
10	Reinaldo A. Bergamaschi	[52]
11	Davide Bertozzi	[59] [60] [64] [78] [88]
12	Per Bjuréus	[15] [16] [19] [21] [27]
13	Dimitris Brachos	[97]
14	F. Brame	[73]
15	Alistair C. Bruce	[75] [102]
16	Bernard Candaele	[112]
17	Jean-Michel Chabloz	[112]
18	Shuming Chen	[108] [113] [118] [122]
19	Xiaowen Chen	[95] [108] [112] [113] [114] [118] [122] [135] [137]
20	Zhipeng Chen	[110]
21	Pai H. Chou	[45]
22	Markus Damm	[73]
23	Abhijit K. Deb	[22] [30] [33] [43] [44]
24	Meganathan Deivasigamani	[129]
25	Johan Ditmar	[14]
26	Petru Eles	[45] [52]
27	Peeter Ellervee	[2] [3] [4]
28	Chaochao Feng	[109] [132] [140] [141]
29	Martti Forsell	[24] [29]
30	Anne-Marie Fouilliart (Anne-Marie Fouillart)	[73]
31	Matt Grange (Matthew Grange)	[99] [105] [127] [131] [134]
32	Cristian Grecu	[70]
33	Christoph Grimm	[73] [86] [94]
34	Liang Guang	[142]
35	Jan Haase	[73]
36	Mazen Hajjar	[60] [64]
37	Philipp A. Hartmann	[73] [100]
38	Raimo Haukilahti	[81]
39	Amr Helmy	[116]
40	Ahmed Hemani	[2] [3] [4] [10] [12] [18] [24] [112] [142]
41	Tomas Henriksson	[75] [102]
42	Fernando Herrera	[73]
43	Andreas Herrholz	[73] [100]
44	Wenmin Hu	[128] [136]
45	Fragkiskos Ieromnimon	[112]
46	Hamza Ijaz	[129]
47	Jouni Isoaho	[1] [4]
48	André Ivanov	[70]
49	Fahimeh Jafari	[107] [119] [133] [143]
50	Syed M. A. H. Jafri	[142]
51	Jiang Jiang	[132]
52	Dapeng Jin	[89] [125]
53	Sven Jonsson	[60] [64]
54	Hasan Khalifeh	[59] [60] [64] [88]
55	Iyad Al Khatib	[59] [60] [64] [78] [88]
56	Tim Kogel	[94]
57	Jari Kreku	[29] [112]
58	Dimitrios Kritharidis	[112]
59	Wolfgang Kuehn (Wolfgang Kühn)	[89] [92] [98] [101] [111] [117] [123] [125] [138]
60	Anshul Kumar	[5]
61	Shashi Kumar	[10] [12] [24] [29] [40]
62	Johannes Lang	[89]
63	S. Lange	[125]
64	Robert Lauter	[47] [81]
65	Jinwen Li	[109] [132]
66	Lu Li	[89]
67	Guang Liang	[57]
68	Dongpei Liu	[128]
69	Hengzhu Liu	[128] [136]
70	Ming Liu	[77] [89] [92] [98] [101] [111] [117] [123] [125] [138]
71	Shaoteng Liu	[129] [144]
72	Zhen'An Liu	[89]
73	Jianzhuang Lu	[113]
74	Zhonghai Lu	[25] [34] [46] [49] [51] [54] [58] [63] [65] [71] [72] [74] [77] [83] [89] [92] [93] [95] [96] [97] [98] [99] [101] [102] [105] [107] [108] [109] [111] [112] [113] [114] [117] [118] [119] [122] [123] [124] [125] [126] [128] [130] [132] [133] [135] [136] [137] [138] [139] [140] [141] [143] [144]
75	Radu Marculescu	[70] [106]
76	Erik Jan Marinissen	[66]
77	Philippe Martin	[112]
78	Marcos Martínez	[73]
79	Deepak Mathaikutty	[50] [67] [87]
80	Mikael Millberg	[24] [27] [28] [32] [38] [40] [41] [68] [76] [102] [104]
81	Naveed Mustafa	[129]
82	Rustam Nabiev	[59] [60] [64] [88]
83	Abdul Naeem	[95] [114] [135] [137]
84	Wolfgang Nebel	[73] [100]
85	Nicola Nicolici	[66]
86	Erland Nilsson	[32] [40] [41] [81]
87	Johann Notbauer	[13]
88	Mattias O'Nils	[6] [8] [9] [18] [20]
89	Johnny Öberg	[2] [3] [4] [5] [6] [18] [22] [24] [28] [30] [32] [33] [37] [38] [43] [44]
90	Ümit Y. Ogras	[70]
91	Frank Oppenheimer	[73]
92	Alex Orailoglu	[45]
93	Dinesh Pamunuwa	[28] [38] [99] [105] [127] [131] [134]
94	Partha Pratim Pande	[70]
95	Hiren D. Patel	[50] [67] [87]
96	Kolin Paul	[142]
97	Antti Pelkonen	[29]
98	Sandro Penolazzi	[56]
99	Tiago Perez	[89]
100	Laurence Pierre (Laurence V. Pierre)	[116]
101	Francesco Poletti	[59] [60] [64] [88]
102	Adam Postula	[3] [18]
103	Tarvo Raudvere	[36] [42] [48] [79] [80] [82]
104	J. Roskoss	[125]
105	Erno Salminen	[70]
106	Ingo Sander	[7] [11] [17] [23] [25] [26] [34] [36] [39] [42] [48] [49] [51] [55] [58] [71] [73] [79] [80] [82] [85] [90] [91] [100] [103] [115] [120] [121]
107	Michel Sarlotte	[112]
108	Andreas Schallenberg	[73]
109	Tiberiu Seceleanu	[62] [84]
110	Huimin She	[74] [96] [126] [130] [139]
111	Dave Shippen	[105]
112	Sandeep K. Shukla (Sandeep Kumar Shukla)	[50] [67] [86] [87]
113	Jonas Sicking	[71]
114	Ashish Kumar Singh	[36] [42] [48]
115	Juha-Pekka Soininen	[24] [29]
116	Dimitrios Soudris (D. J. Soudris)	[112] [124]
117	Bengt Svantesson	[3]
118	Shaghayeghsadat Tabatabaei	[129]
119	Hannu Tenhunen	[1] [2] [3] [37] [38] [99] [142]
120	Rikard Thid	[40] [41] [55]
121	Kari Tiensyrjä	[24] [112]
122	Kjell Torkelsson	[14]
123	Geert Vanmeerbeeck	[112]
124	Bart Vanthournout	[112]
125	Eugenio Villar	[73] [86] [94]
126	Arseni Vitkovski	[47] [81]
127	Qiang Wang	[89] [125]
128	Weixing Wang	[53]
129	Roshan Weerasekera	[99] [105] [127] [131] [134]
130	Awet Yemane Weldezion	[99] [105] [131]
131	Andreas Wiefrink	[112]
132	Pieter van der Wolf	[75] [102]
133	Hucheng Wu	[113]
134	Wenbiao Wu	[23]
135	Lei Xia	[93]
136	Hao Xu	[89] [125]
137	Sotirios Xydis	[112] [124]
138	Mohammad Hossien Yaghmaee (Mohammad Hossein Yaghmaee, Mohammad Hossien Yaghmaee Moghaddam)	[107] [119]
139	Shuo Yang	[89] [98] [125]
140	Xianju Yang	[141]
141	Bei Yin	[54]
142	Botao Zhang	[128]
143	Minxuan Zhang	[109] [132] [140] [141]
144	Li-Rong Zheng	[28] [38] [74] [96] [126] [130] [139]
145	Mingchen Zhong	[63]
146	Dian Zhou	[74] [96] [126] [130] [139]
147	Jun Zhu	[90] [91] [100] [103] [115] [120] [121]
148	Heiko Zimmer	[35]

Colors in the list of coauthors

Last update Sat Jun 2 20:57:36 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page