Rekha K. James

	2009
8		Rekha K. James, K. Poulose Jacob, Sreela Sasi: Double Digit Decimal Multiplier on XILINX FPGA. ESA 2009: 47-53
7		Rekha K. James, K. Poulose Jacob, Sreela Sasi: High Performance, Low Latency Double Digit Decimal Multiplier on ASIC and FPGA. NaBIC 2009: 1445-1450
	2008
6		T. K. Shahana, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi: RRNS-Convolutional encoded concatenated code for OFDM based wireless communication. ICON 2008: 1-6
5		T. K. Shahana, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi: Dual-mode RNS based programmable decimation filter for WCDMA and WLANa. ISCAS 2008: 952-955
4		Rekha K. James, T. K. Shahana, K. Poulose Jacob, Sreela Sasi: Fixed Point Decimal Multiplication Using RPS Algorithm. ISPA 2008: 343-350
3		T. K. Shahana, Babita R. Jose, Rekha K. James, K. Poulose Jacob, Sreela Sasi: RNS Based Programmable Multi-Mode Decimation Filter for WCDMA and WiMAX. VTC Spring 2008: 1831-1835
	2007
2		T. K. Shahana, Rekha K. James, K. Poulose Jacob, Sreela Sasi: Genetic Algorithm-Based Combinational Logic Synthesis Using Universal Logic Modules. ESA 2007: 210-215
	2006
1		Rekha K. James, T. K. Shahana, K. Poulose Jacob, Sreela Sasi: Delay-Reduced Combinational Logic Synthesis using Multiplexers. ESA 2006: 105-110

Coauthor Index

1	K. Poulose Jacob	[1] [2] [3] [4] [5] [6] [7] [8]
2	Babita R. Jose	[3] [5] [6]
3	Sreela Sasi	[1] [2] [3] [4] [5] [6] [7] [8]
4	T. K. Shahana	[1] [2] [3] [4] [5] [6]

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