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| 2012 | ||
|---|---|---|
| 3 | Manish Kumar Jaiswal, Ray C. C. Cheung: High Performance Reconfigurable Architecture for Double Precision Floating Point Division. ARC 2012: 302-313 | |
| 2 | Manish Kumar Jaiswal, Nitin Chandrachoodan: FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture. IEEE Trans. Computers 61(1): 60-72 (2012) | |
| 2009 | ||
| 1 | Manish Kumar Jaiswal, Nitin Chandrachoodan: Efficient Implementation of Floating-Point Reciprocator on FPGA. VLSI Design 2009: 267-271 | |
| 1 | Nitin Chandrachoodan | [1] [2] |
| 2 | Ray C. C. Cheung (Ray Chak-Chung Cheung) | [3] |
Colors in the list of coauthors
Last update Sat Jun 2 20:57:36 2012 CET by the DBLP Team —
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