![]() | ![]() |
| 2003 | ||
|---|---|---|
| 4 | Sushil Chandra Jain, Anshul Kumar, Shashi Kumar: Hybrid Multi-FPGA Board Evaluation by Permitting Limited Multi-Hop Routing. Design Autom. for Emb. Sys. 8(4): 309-326 (2003) | |
| 2002 | ||
| 3 | Sushil Chandra Jain, Anshul Kumar, Shashi Kumar: Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing. IEEE International Workshop on Rapid System Prototyping 2002: 66- | |
| 2000 | ||
| 2 | Sushil Chandra Jain, Anshul Kumar, Shashi Kumar: Efficient Embedding of Partitioned Circuits onto Multi-FPGA Boards. FPL 2000: 201-210 | |
| 1 | Sushil Chandra Jain, Shashi Kumar, Anshul Kumar: Evaluation of Various Routing Architectures for Multi-FPGA Boards. VLSI Design 2000: 262-267 | |
| 1 | Anshul Kumar | [1] [2] [3] [4] |
| 2 | Shashi Kumar | [1] [2] [3] [4] |
Data released under the ODC-BY 1.0 license — See also our legal information page