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- CSB - MetaPress - Google - Bing - Yahoo
 | 2001 | |
|---|---|---|
| 6 |      | Sunil K. Jain, Greg P. Chema: Testing beyond EPA: TDF methodology solutions matrix. ITC 2001: 424-432 |
| 1985 | ||
| 5 | | Sunil K. Jain, Vishwani D. Agrawal: Modeling and Test Generation Algorithms for MOS Circuits. IEEE Trans. Computers 34(5): 426-433 (1985) |
| 1984 | ||
| 4 | | Sunil K. Jain, Vishwani D. Agrawal: STAFAN: An alternative to fault simulation. DAC 1984: 18-23 |
| 3 | | Sudhakar M. Reddy, Vishwani D. Agrawal, Sunil K. Jain: A gate level model for CMOS combinational logic circuits with application to fault detection. DAC 1984: 504-509 |
| 1983 | ||
| 2 | | Sunil K. Jain, Vishwani D. Agrawal: Test generation for MOS circuits using D-algorithm. DAC 1983: 64-70 |
| 1 | | Sunil K. Jain, Alfred K. Susskind: Test strategy for microprocessers. DAC 1983: 703-708 |
| 1 | Vishwani D. Agrawal | [2] [3] [4] [5] |
| 2 | Greg P. Chema | [6] |
| 3 | Sudhakar M. Reddy | [3] |
| 4 | Alfred K. Susskind | [1] |
Colors in the list of coauthors
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