Francisco J. Jaime

	2011
7		Francisco J. Jaime, M. A. Sánchez, Javier Hormigo, Julio Villalba, Emilio L. Zapata: High-Speed Algorithms and Architectures for Range Reduction Computation. IEEE Trans. VLSI Syst. 19(3): 512-516 (2011)
	2010
6		Francisco J. Jaime, Miguel A. Sanchez, Javier Hormigo, Julio Villalba, Emilio L. Zapata: Enhanced Scaling-Free CORDIC. IEEE Trans. on Circuits and Systems 57-I(7): 1654-1662 (2010)
	2009
5		Javier Hormigo, Manuel Ortiz, Francisco J. Quiles, Francisco J. Jaime, Julio Villalba, Emilio L. Zapata: Efficient Implementation of Carry-Save Adders in FPGAs. ASAP 2009: 207-210
	2008
4		Francisco J. Jaime, Javier Hormigo, Julio Villalba, Emilio L. Zapata: SIMD Enhancements for a Hough Transform Implementation. DSD 2008: 899-903
3		Francisco J. Jaime, Javier Hormigo, Julio Villalba, Emilio L. Zapata: New SIMD instructions set for image processing applications enhancement. ICIP 2008: 1396-1399
2		Francisco J. Jaime, Julio Villalba, Javier Hormigo, Emilio L. Zapata: Pipelined Architecture for Additive Range Reduction. Signal Processing Systems 53(1-2): 103-112 (2008)
	2006
1		Francisco J. Jaime, Julio Villalba, Javier Hormigo, Emilio L. Zapata: Pipelined Range Reduction for Floating Point Numbers. ASAP 2006: 145-152

Coauthor Index

1	Javier Hormigo	[1] [2] [3] [4] [5] [6] [7]
2	Manuel Ortiz	[5]
3	Francisco J. Quiles (Francisco José Quiles Flor)	[5]
4	M. A. Sánchez	[7]
5	Miguel A. Sanchez	[6]
6	Julio Villalba	[1] [2] [3] [4] [5] [6] [7]
7	Emilio L. Zapata	[1] [2] [3] [4] [5] [6] [7]

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