P. Jaenen

	2009
2		Yann Civale, Deniz Sabuncuoglu Tezcan, Harold G. G. Philipsen, P. Jaenen, Rahul Agarwal, F. Duval, Philippe Soussan, Youssef Travaly, Eric Beyne: Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumping. 3DIC 2009: 1-4
	2005
1		S. Beckx, M. Demand, S. Locorotondo, K. Henson, M. Claes, V. Paraschiv, D. Shamiryan, P. Jaenen, W. Boullart, S. Degendt: Implementation of high-k and metal gate materials for the 45nm node and beyond: gate patterning development. Microelectronics Reliability 45(5-6): 1007-1011 (2005)

Coauthor Index

1	Rahul Agarwal	[2]
2	S. Beckx	[1]
3	Eric Beyne	[2]
4	W. Boullart	[1]
5	Yann Civale	[2]
6	M. Claes	[1]
7	S. Degendt	[1]
8	M. Demand	[1]
9	F. Duval	[2]
10	K. Henson	[1]
11	S. Locorotondo	[1]
12	V. Paraschiv	[1]
13	Harold G. G. Philipsen	[2]
14	D. Shamiryan	[1]
15	Philippe Soussan	[2]
16	Deniz Sabuncuoglu Tezcan	[2]
17	Youssef Travaly	[2]

Colors in the list of coauthors

Last update Sat Jun 2 20:57:36 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page