 | 2012 |
| 40 |  | Salim Haddad,
Amer Baghdadi,
Michel Jézéquel:
On the Convergence Speed of Turbo Demodulation with Turbo Decoding
CoRR abs/1203.5037: (2012) |
| 2011 |
| 39 |  | Purushotham Murugappa,
Rachid Al-Khayat,
Amer Baghdadi,
Michel Jézéquel:
A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding.
DATE 2011: 228-233 |
| 38 |  | Pallavi Reddy,
Fabien Clermidy,
Amer Baghdadi,
Michel Jézéquel:
A low complexity stopping criterion for reducing power consumption in turbo decoders.
DATE 2011: 649-654 |
| 37 |  | Rachid Al-Khayat,
Purushotham Murugappa,
Amer Baghdadi,
Michel Jézéquel:
Area and throughput optimized ASIP for multi-standard turbo decoding.
International Symposium on Rapid System Prototyping 2011: 79-84 |
| 36 |  | Yangyang Tang,
Emmanuel Boutillon,
Christophe Jégo,
Michel Jézéquel:
Hardware efficiency versus error probability in unreliable computation.
SiPS 2011: 168-173 |
| 35 |  | Atif Raza Jafri,
Amer Baghdadi,
Michel Jézéquel:
Parallel MIMO Turbo Equalization.
IEEE Communications Letters 15(3): 290-292 (2011) |
| 34 |  | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Deepak Gupta,
Michel Jézéquel:
Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture.
Signal Processing Systems 64(1): 17-29 (2011) |
| 2010 |
| 33 |  | Yangyang Tang,
Emmanuel Boutillon,
Christophe Jégo,
Michel Jézéquel:
A new single-error correction scheme based on self-diagnosis residue number arithmetic.
DASIP 2010: 27-33 |
| 32 |  | Atif Raza Jafri,
Amer Baghdadi,
Michel Jézéquel:
Rapid design and prototyping of universal soft demapper.
ISCAS 2010: 3769-3772 |
| 31 |  | Olivier Muller,
Amer Baghdadi,
Michel Jézéquel:
Parallelism Efficiency in Convolutional Turbo Decoding.
EURASIP J. Adv. Sig. Proc. 2010: (2010) |
| 30 |  | Meysam Zargham,
Christian Schlegel,
Jorge Pérez Chamorro,
Cyril Lahuec,
Fabrice Seguin,
Michel Jézéquel,
Vincent C. Gaudet:
Scaling of analog LDPC decoders in sub-100 nm CMOS processes.
Integration 43(4): 365-377 (2010) |
| 2009 |
| 29 |  | Atif Raza Jafri,
Daoud Karakolah,
Amer Baghdadi,
Michel Jézéquel:
ASIP-based flexible MMSE-IC Linear Equalizer for MIMO turbo-equalization applications.
DATE 2009: 1620-1625 |
| 28 |  | Fabrizio Vacca,
Guido Masera,
Hazem Moussa,
Amer Baghdadi,
Michel Jézéquel:
Flexible Architectures for LDPC Decoders Based on Network on Chip Paradigm.
DSD 2009: 582-589 |
| 27 |  | Atif Raza Jafri,
Amer Baghdadi,
Michel Jézéquel:
Rapid Prototyping of ASIP-based Flexible MMSE-IC Linear Equalizer.
IEEE International Workshop on Rapid System Prototyping 2009: 130-133 |
| 26 |  | Jorge Pérez Chamorro,
Fabrice Seguin,
Cyril Lahuec,
Michel Jézéquel,
Gwenaëlle Le Mestre:
Decoding a Family of Dense Codes using the Sum-Product Algorithm.
ISCAS 2009: 2685-2688 |
| 25 |  | Daoud Karakolah,
Christophe Jégo,
Charlotte Langlais,
Michel Jézéquel:
Design of an Iterative Receiver for Linearly Precoded MIMO Systems.
ISCAS 2009: 597-600 |
| 24 |  | Atif Raza Jafri,
Amer Baghdadi,
Michel Jézéquel:
ASIP-Based Universal Demapper for Multiwireless Standards.
Embedded Systems Letters 1(1): 9-13 (2009) |
| 23 |  | Olivier Muller,
Amer Baghdadi,
Michel Jézéquel:
From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding.
IEEE Trans. VLSI Syst. 17(1): 92-102 (2009) |
| 22 |  | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping.
Signal Processing Systems 57(3): 349-361 (2009) |
| 2008 |
| 21 |  | Hazem Moussa,
Amer Baghdadi,
Michel Jézéquel:
Binary de Bruijn on-chip network for a flexible multiprocessor LDPC decoder.
DAC 2008: 429-434 |
| 20 |  | Olivier Muller,
Amer Baghdadi,
Michel Jézéquel:
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding.
IEEE International Workshop on Rapid System Prototyping 2008: 128-134 |
| 19 |  | Hazem Moussa,
Amer Baghdadi,
Michel Jézéquel:
Binary de Bruijn interconnection network for a flexible LDPC/turbo decoder.
ISCAS 2008: 97-100 |
| 18 |  | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel,
Deepak Gupta:
A highly parallel Turbo Product Code decoder without interleaving resource.
SiPS 2008: 1-6 |
| 2007 |
| 17 |  | Hazem Moussa,
Olivier Muller,
Amer Baghdadi,
Michel Jézéquel:
Butterfly and benes-based on-chip communication networks for multiprocessor turbo decoding.
DATE 2007: 654-659 |
| 16 |  | Camille Leroux,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
Towards Gb/s turbo decoding of product code onto an FPGA device.
ISCAS 2007: 909-912 |
| 15 |  | Haisheng Liu,
Jean-Philippe Diguet,
Christophe Jégo,
Michel Jézéquel,
Emmanuel Boutillon:
Energy Efficient Turbo Decoder with Reduced State Metric Quantization.
SiPS 2007: 237-242 |
| 2006 |
| 14 |  | Olivier Muller,
Amer Baghdadi,
Michel Jézéquel:
ASIP-based multiprocessor SoC design for simple and double binary turbo decoding.
DATE 2006: 1330-1335 |
| 13 |  | Olivier Muller,
Amer Baghdadi,
Michel Jézéquel:
On the Parallelism of Convolutional Turbo Decoding and Interleaving Interference.
GLOBECOM 2006 |
| 12 |  | Erwan Piriou,
Christophe Jégo,
Patrick Adde,
Raphaël Le Bidan,
Michel Jézéquel:
Efficient architecture for Reed Solomon block turbo code.
ISCAS 2006 |
| 11 |  | Matthieu Arzel,
Fabrice Seguin,
Cyril Lahuec,
Michel Jézéquel:
Semi-iterative analog turbo decoding.
ISCAS 2006 |
| 10 |  | Erwan Piriou,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
A Flexible Architecture For Block Turbo Decoders Using BCH Or Reed-Solomon Components Codes.
ISVLSI 2006: 430-431 |
| 9 |  | Erwan Piriou,
Christophe Jégo,
Patrick Adde,
Michel Jézéquel:
Design, Implementation and Prototyping of a Flexible Architecture Dedicated to Block Turbo Decoding.
ReCoSoC 2006: 152-159 |
| 2005 |
| 8 |  | Matthieu Arzel,
Cyril Lahuec,
Fabrice Seguin,
David Gnaedig,
Michel Jézéquel:
. Analog slice turbo decoding.
ISCAS (1) 2005: 332-335 |
| 7 |  | Ramesh Pyndiah,
Michel Jézéquel:
Foreword / Éditorial.
Annales des Télécommunications 60(1-2): 6-9 (2005) |
| 6 |  | David Gnaedig,
Emmanuel Boutillon,
Michel Jézéquel,
Vincent C. Gaudet,
P. Glenn Gulak:
On Multiple Slice Turbo Codes.
Annales des Télécommunications 60(1-2): 79-102 (2005) |
| 5 |  | David Gnaedig,
Emmanuel Boutillon,
Michel Jézéquel:
Design of Three-Dimensional Multiple Slice Turbo Codes.
EURASIP J. Adv. Sig. Proc. 2005(6): 808-819 (2005) |
| 2004 |
| 4 |  | David Gnaedig,
Emmanuel Boutillon,
Eric Martin,
Amor Nafkha,
Michel Jézéquel,
Jacky Tousch,
Nathalie Brengarth:
Synthèse d'architecture pour la réalisation comportementale de l'algorithme MAP pour Turbo Décodeur.
Annales des Télécommunications 59(3-4): 325-348 (2004) |
| 2001 |
| 3 |  | Michel Jézéquel,
Ramesh Pyndiah:
Turbo codes: A wide-spreading technique.
Annales des Télécommunications 56(7-8): 375-376 (2001) |
| 2 |  | Michel Jézéquel,
Ramesh Pyndiah:
Turbocodes: Une technique qui se diffuse.
Annales des Télécommunications 56(7-8): 377-378 (2001) |
| 1999 |
| 1 |  | Claude Berrou,
Catherine Douillard,
Michel Jézéquel:
Multiple parallel concatenation of circular recursive systematic convolutional (Crsc ) codes.
Annales des Télécommunications 54(3-4): 166-172 (1999) |