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| 2005 | ||
|---|---|---|
| 2 | Xiaowu Zhang, E. H. Wong, Ranjan Rajoo, Mahadevan K. Iyer, J. F. J. M. Caers, X. J. Zhao: Development of process modeling methodology for flip chip on flex interconnections with non-conductive adhesives. Microelectronics Reliability 45(7-8): 1215-1221 (2005) | |
| 2003 | ||
| 1 | Jayasanker Jayabalan, Chee Kiang Goh, Ooi Ban Leong, Leong Mook Seng, Mahadevan K. Iyer, Andrew A. O. Tay: PLL Based High Speed Functional Testing. Asian Test Symposium 2003: 116-119 | |
| 1 | J. F. J. M. Caers | [2] |
| 2 | Chee Kiang Goh | [1] |
| 3 | Jayasanker Jayabalan | [1] |
| 4 | Ooi Ban Leong | [1] |
| 5 | Ranjan Rajoo | [2] |
| 6 | Leong Mook Seng | [1] |
| 7 | Andrew A. O. Tay | [1] |
| 8 | E. H. Wong | [2] |
| 9 | Xiaowu Zhang | [2] |
| 10 | X. J. Zhao | [2] |
Colors in the list of coauthors
Last update Thu May 31 18:55:10 2012 CET by the DBLP Team —
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