Atsushi Iwata

	2011
45		Kazuhiro Shimonomura, Seiji Kameda, Atsushi Iwata, Tetsuya Yagi: Wide-Dynamic-Range APS-Based Silicon Retina With Brightness Constancy. IEEE Transactions on Neural Networks 22(9): 1482-1493 (2011)
44		Yudai Honma, Masaki Aida, Hideyuki Shimonishi, Atsushi Iwata: A New Multi-Path Routing Methodology Based on Logit-Type Probability Assignment. IEICE Transactions 94-B(8): 2282-2291 (2011)
43		Atsushi Iwata, Yoshitaka Murasaka, Tomoaki Maeda, Takafumi Ohmoto: Background Calibration Techniques for Low-Power and High-Speed Data Conversion. IEICE Transactions 94-C(6): 923-929 (2011)
	2010
42		Takeshi Yoshida, Yoshihiro Masui, Ryoji Eki, Atsushi Iwata, Masayuki Yoshida, Kazumasa Uematsu: A Neural Recording Amplifier with Low-Frequency Noise Suppression. IEICE Transactions 93-C(6): 849-854 (2010)
	2009
41		Hideyuki Shimonishi, Hideya Ochiai, Nobuyuki Enomoto, Atsushi Iwata: Building Hierarchical Switch Network Using OpenFlow. INCoS 2009: 391-394
40		Takeshi Yoshida, Yoshihiro Masui, Ryoji Eki, Atsushi Iwata, Masayuki Yoshida, Kazumasa Uematsu: A Neural Signal Detection Amplifier with Low-frequency Noise Suppression. ISCAS 2009: 661-664
39		Yoshihiro Masui, Takeshi Yoshida, Atsushi Iwata: A 2.0 Vpp Input, 0.5 V Supply Delta Amplifier with A-to-D Conversion. IEICE Transactions 92-C(6): 828-834 (2009)
	2008
38		Nobuyuki Enomoto, Hideyuki Shimonishi, Junichi Higuchi, Takashi Yoshikawa, Atsushi Iwata: High-Speed, Short-Latency Multipath Ethernet for Data Center Area Communications. GLOBECOM 2008: 1550-1555
37		Nobuyuki Enomoto, Hideyuki Shimonishi, Junichi Higuchi, Takashi Yoshikawa, Atsushi Iwata: High-Speed, Short-Latency Multipath Ethernet Transport for Interconnections. Hot Interconnects 2008: 75-84
36		Hideyuki Shimonishi, Takashi Yoshikawa, Atsushi Iwata: Off-the-path flow handling mechanism forhigh-speed and programmable traffic management. PRESTO 2008: 15-20
	2007
35		Nobuharu Kami, Jun Suzuki, Yoichi Hidaka, Takashi Yoshikawa, Atsushi Iwata: Multilayer In-service Reconfiguration for Network Computing Systems. NCA 2007: 324-331
34		Daisuke Kosaka, Makoto Nagata, Yoshitaka Murasaka, Atsushi Iwata: Chip-Level Substrate Coupling Analysis with Reference Structures for Verification. IEICE Transactions 90-A(12): 2651-2660 (2007)
33		Daisuke Kosaka, Makoto Nagata, Yoshitaka Murasaka, Atsushi Iwata: Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits. IEICE Transactions 90-A(2): 380-387 (2007)
32		Atsushi Iwata, Takeshi Yoshida, Mamoru Sasaki: Low-Voltage and Low-Noise CMOS Analog Circuits Using Scaled Devices. IEICE Transactions 90-C(6): 1149-1155 (2007)
	2006
31		Kan'ya Sasaki, Seiji Kameda, Atsushi Iwata: Stereo Matching Algorithm Using a Weighted Average of Costs Aggregated by Various Window Sizes. ACCV (2) 2006: 771-780
30		Jun Suzuki, Yoichi Hidaka, Junichi Higuchi, Takashi Yoshikawa, Atsushi Iwata: ExpressEther - Ethernet-Based Virtualization Technology for Reconfigurable Hardware Platform. Hot Interconnects 2006: 45-51
29		Atsushi Iwata: Carrier-Grade Ethernet Technologies for Next Generation Wide Area Ethernet. IEICE Transactions 89-B(3): 651-660 (2006)
28		Masaki Umayabashi, Yoichi Hidaka, Nobuyuki Enomoto, Daisaku Ogasahara, Kazuo Takagi, Atsushi Iwata, Akira Arutaki: Improving Ethernet Reliability and Stability Using Global Open Ethernet Technology. IEICE Transactions 89-B(3): 675-682 (2006)
27		Kan'ya Sasaki, Takashi Morie, Atsushi Iwata: A VLSI Spiking Feedback Neural Network with Negative Thresholding and Its Application to Associative Memory. IEICE Transactions 89-C(11): 1637-1644 (2006)
26		Takeshi Yoshida, Yoshihiro Masui, Takayuki Mashimo, Mamoru Sasaki, Atsushi Iwata: A 1 V Low-Noise CMOS Amplifier Using Autozeroing and Chopper Stabilization Technique. IEICE Transactions 89-C(6): 769-774 (2006)
25		Osamu Nomura, Takashi Morie, Keisuke Korekado, Teppei Nakano, Masakazu Matsugu, Atsushi Iwata: An Image-Filtering LSI Processor Architecture for Face/Object Recognition Using a Sorted Projection-Field Model Based on a Merged/Mixed Analog-Digital Architecture. IEICE Transactions 89-C(6): 781-791 (2006)
	2005
24		Osamu Nomura, Takashi Morie, Masakazu Matsugu, Atsushi Iwata: A Convolutional Neural Network VLSI Architecture Using Sorting Model for Reducing Multiply-and-Accumulation Operations. ICNC (3) 2005: 1006-1014
23		Takeshi Yoshida, Miho Akagi, Mamoru Sasaki, Atsushi Iwata: A 1V supply successive approximation ADC with rail-to-rail input voltage range. ISCAS (1) 2005: 192-195
22		Mitsuru Shiozaki, Toru Mukai, Masahiro Ono, Mamoru Sasaki, Atsushi Iwata: A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip Using Two-Step Synchronization Technique. IEICE Transactions 88-C(6): 1233-1240 (2005)
	2004
21		Osamu Nomura, Takashi Morie, Keisuke Korekado, Masakazu Matsugu, Atsushi Iwata: A Convolutional Neural Network VLSI Architecture Using Thresholding and Weight Decomposition. KES 2004: 995-1001
20		Norihito Fujita, Yuichi Ishikawa, Atsushi Iwata, Rauf Izmailov: Coarse-grain replica management strategies for dynamic replication of Web contents. Computer Networks 45(1): 19-34 (2004)
19		Atsushi Iwata, Yoichi Hidaka, Masaki Umayabashi, Nobuyuki Enomoto, Akira Arutaki: Global open ethernet (GOE) system and its performance evaluation. IEEE Journal on Selected Areas in Communications 22(8): 1432-1442 (2004)
18		Tsutomu Yoshimura, Atsushi Iwata: An analysis of interference in synchronous systems. IEICE Electronic Express 1(15): 465-471 (2004)
17		Keisuke Korekado, Takashi Morie, Osamu Nomura, Hiroshi Ando, Teppei Nakano, Masakazu Matsugu, Atsushi Iwata: A VLSI convolutional neural network for image recognition using merged/mixed analog-digital architecture. Journal of Intelligent and Fuzzy Systems 15(3-4): 173-179 (2004)
	2003
16		Keisuke Korekado, Takashi Morie, Osamu Nomura, Hiroshi Ando, Teppei Nakano, Masakazu Matsugu, Atsushi Iwata: A Convolutional Neural Network VLSI for Image Recognition Using Merged/Mixed Analog-Digital Architecture. KES 2003: 169-176
	2002
15		Teppei Nakano, Takashi Morie, Makoto Nagata, Atsushi Iwata: A cellular-automaton-type image extraction algorithm and its implementation using an FPGA. APCCAS (2) 2002: 197-200
14		Makoto Nagata, Yoshitaka Murasaka, Youichi Nishimori, Takashi Morie, Atsushi Iwata: Substrate Noise Analysis with Compact Digital Noise Injection and Substrate Models. VLSI Design 2002: 71-76
	2001
13		Makoto Nagata, Takafumi Ohmoto, Jin Nagai, Takashi Morie, Atsushi Iwata: Test circuits for substrate noise evaluation in CMOS digital ICs. ASP-DAC 2001: 13-14
12		Yoshitaka Murasaka, Makoto Nagata, Takafumi Ohmoto, Takashi Morie, Atsushi Iwata: Chip-Level Substrate Noise Analysis with Network Reduction by Fundamental Matrix Computation. ISQED 2001: 482-487
11		Takashi Morie, Tomohiro Matsuura, Makoto Nagata, Atsushi Iwata: An Efficient Clustering Algorithm Using Stochastic Association Model and Its Implementation Using Nanostructures. NIPS 2001: 1115-1122
	2000
10		Noriaki Takeda, Mitsuru Homma, Makoto Nagata, Takashi Morie, Atsushi Iwata: A smart imager for the vision processing front-END. ASP-DAC 2000: 19-20
9		Kenichi Murakoshi, Takashi Morie, Makoto Nagata, Atsushi Iwata: An arbitrary chaos generator core curcuit using PWM/PPM signals. ASP-DAC 2000: 23-24
8		Makoto Nagata, Atsushi Iwata: Substrate crosstalk analysis in mixed signal CMOS integrated circuits: embedded tutorial. ASP-DAC 2000: 623-630
7		Atsushi Iwata, Norihito Fujita: A hierarchical multilayer QoS routing system with dynamic SLA management. IEEE Journal on Selected Areas in Communications 18(12): 2603-2616 (2000)
6		Makoto Nagata, Jin Nagai, Takashi Morie, Atsushi Iwata: Measurements and analyses of substrate noise waveform inmixed-signal IC environment. IEEE Trans. on CAD of Integrated Circuits and Systems 19(6): 671-678 (2000)
5		Rauf Izmailov, Atsushi Iwata, Bhaskar Sengupta: ATM Routing Algorithms for Multimedia Traffic in Private ATM Networks. J. Heuristics 6(1): 21-38 (2000)
	1999
4		Atsushi Iwata, Makoto Nagata, Hiroyuki Nakamoto, Noriaki Takeda, Mitsuru Homma, Hiroto Higashi, Takashi Morie: A Feature Associative Processor for Image Recognition Based on A-D merged Architecture. VLSI 1999: 77-88
	1998
3		Souta Sakabayashi, Takashi Morie, Makoto Nagata, Atsushi Iwata: Nonlinear Function Generators and Chaotic Signal Generators Based on Pulse-Phase Modulation. ICONIP 1998: 582-585
2		Hiroshi Ando, Takashi Morie, Makoto Nagata, Atsushi Iwata: Oscillator Networks for Image Segmentation and Their Circuits Using Pulse Modulation Method. ICONIP 1998: 586-589
	1995
1		Atsushi Iwata, N. Mori, Chinatsu Ikeda, Hiroshi Suzuki, Maximilian Ott: ATM Connection and Traffic Management Schemes for Multimedia Internetworking. Commun. ACM 38(2): 72-89 (1995)

Coauthor Index

1	Masaki Aida	[44]
2	Miho Akagi	[23]
3	Hiroshi Ando	[2] [16] [17]
4	Akira Arutaki	[19] [28]
5	Ryoji Eki	[40] [42]
6	Nobuyuki Enomoto	[19] [28] [37] [38] [41]
7	Norihito Fujita	[7] [20]
8	Yoichi Hidaka	[19] [28] [30] [35]
9	Hiroto Higashi	[4]
10	Junichi Higuchi	[30] [37] [38]
11	Mitsuru Homma	[4] [10]
12	Yudai Honma	[44]
13	Chinatsu Ikeda	[1]
14	Yuichi Ishikawa	[20]
15	Rauf Izmailov	[5] [20]
16	Seiji Kameda	[31] [45]
17	Nobuharu Kami	[35]
18	Keisuke Korekado	[16] [17] [21] [25]
19	Daisuke Kosaka	[33] [34]
20	Tomoaki Maeda	[43]
21	Takayuki Mashimo	[26]
22	Yoshihiro Masui	[26] [39] [40] [42]
23	Masakazu Matsugu	[16] [17] [21] [24] [25]
24	Tomohiro Matsuura	[11]
25	N. Mori	[1]
26	Takashi Morie	[2] [3] [4] [6] [9] [10] [11] [12] [13] [14] [15] [16] [17] [21] [24] [25] [27]
27	Toru Mukai	[22]
28	Kenichi Murakoshi	[9]
29	Yoshitaka Murasaka	[12] [14] [33] [34] [43]
30	Jin Nagai	[6] [13]
31	Makoto Nagata	[2] [3] [4] [6] [8] [9] [10] [11] [12] [13] [14] [15] [33] [34]
32	Hiroyuki Nakamoto	[4]
33	Teppei Nakano	[15] [16] [17] [25]
34	Youichi Nishimori	[14]
35	Osamu Nomura	[16] [17] [21] [24] [25]
36	Hideya Ochiai	[41]
37	Daisaku Ogasahara	[28]
38	Takafumi Ohmoto	[12] [13] [43]
39	Masahiro Ono	[22]
40	Maximilian Ott (Max Ott)	[1]
41	Souta Sakabayashi	[3]
42	Kan'ya Sasaki	[27] [31]
43	Mamoru Sasaki	[22] [23] [26] [32]
44	Bhaskar Sengupta	[5]
45	Hideyuki Shimonishi	[36] [37] [38] [41] [44]
46	Kazuhiro Shimonomura	[45]
47	Mitsuru Shiozaki	[22]
48	Hiroshi Suzuki	[1]
49	Jun Suzuki	[30] [35]
50	Kazuo Takagi	[28]
51	Noriaki Takeda	[4] [10]
52	Kazumasa Uematsu	[40] [42]
53	Masaki Umayabashi	[19] [28]
54	Tetsuya Yagi	[45]
55	Masayuki Yoshida	[40] [42]
56	Takeshi Yoshida	[23] [26] [32] [39] [40] [42]
57	Takashi Yoshikawa	[30] [35] [36] [37] [38]
58	Tsutomu Yoshimura	[18]

Colors in the list of coauthors

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