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| 2007 | ||
|---|---|---|
| 2 | Tasuku Ito, Michitaka Kameyama: Universal VLSI Based on a Redundant Multiple-Valued Sequential Logic Operation. ISMVL 2007: 39 | |
| 1 | Tasuku Ito, Michitaka Kameyama: Universal VLSI Based on a Redundant Multiple-Valued Sequential Logic Operation. Multiple-Valued Logic and Soft Computing 13(4-6): 553-568 (2007) | |
| 1 | Michitaka Kameyama | [1] [2] |
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