Jouni Isoaho

	2012
54		Sampo Tuuna, Ethiopia Nigussie, Jouni Isoaho, Hannu Tenhunen: Modeling of Energy Dissipation in RLC Current-Mode Signaling. IEEE Trans. VLSI Syst. 20(6): 1146-1151 (2012)
53		Sampo Tuuna, Jouni Isoaho, Hannu Tenhunen: Skewing-based method for reduction of functional crosstalk and power supply noise caused by on-chip buses. IET Computers & Digital Techniques 6(2): 114-124 (2012)
	2011
52		Liang Guang, Bo Yang, Juha Plosila, Jouni Isoaho, Hannu Tenhunen: Hierarchical Agent Monitoring Design Platform - Towards Self-aware and Adaptive Embedded Systems. PECCS 2011: 573-581
51		Pekka Rantala, Seppo Virtanen, Jouni Isoaho: Hybrid Trust Model for Internet Routing CoRR abs/1105.5518: (2011)
	2010
50		Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Monitoring and reconfiguration techniques for power supply variation tolerant on-chip links. ISCAS 2010: 2892-2895
49		Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Process variation tolerant on-chip communication using receiver and driver reconfiguration. ISQED 2010: 453-460
48		Liang Guang, Ethiopia Nigussie, Pekka Rantala, Jouni Isoaho, Hannu Tenhunen: Hierarchical agent monitoring design approach towards self-aware parallel systems-on-chip. ACM Trans. Embedded Comput. Syst. 9(3): (2010)
47		Jouni Isoaho, Seppo Virtanen, Juha Plosila: Current Challenges in Embedded Communication Systems. IJERTCS 1(1): 1-21 (2010)
46		Liang Guang, Juha Plosila, Jouni Isoaho, Hannu Tenhunen: Hierarchical Agent Monitored Parallel On-Chip System: A Novel Design Paradigm and its Formal Specification. IJERTCS 1(2): 86-105 (2010)
45		Liang Guang, Ethiopia Nigussie, Jouni Isoaho, Pekka Rantala, Hannu Tenhunen: Interconnection alternatives for hierarchical monitoring communication in parallel SoCs. Microprocessors and Microsystems - Embedded Hardware Design 34(5): 118-128 (2010)
	2009
44		Alexander Wei Yin, Liang Guang, Ethiopia Nigussie, Pasi Liljeberg, Jouni Isoaho, Hannu Tenhunen: Architectural Exploration of Per-Core DVFS for Energy-Constrained On-Chip Networks. DSD 2009: 141-146
	2008
43		Tuomo Saarni, Jussi Hakokari, Jouni Isoaho, Tapio Salakoski: Utterance-level normalization for relative articulation rate analysis. INTERSPEECH 2008: 538-541
42		Jussi Hakokari, Tuomo Saarni, Jouni Isoaho, Tapio Salakoski: Correlation of utterance length and segmental duration in Finnish is questionable. INTERSPEECH 2008: 881-884
41		Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Area efficient delay-insensitive and differential current sensing on-chip interconnect. SoCC 2008: 143-146
40		Sampo Tuuna, Jouni Isoaho, Hannu Tenhunen: Analysis of Delay Variation in Encoded On-Chip Bus Signaling under Process Variation. VLSI Design 2008: 228-234
39		Heidi Himmanen, Miska M. Hannuksela, Teppo Kurki, Jouni Isoaho: Objectives for New Error Criteria for Mobile Broadcasting of Streaming Audiovisual Services. EURASIP J. Adv. Sig. Proc. 2008: (2008)
38		Sampo Tuuna, Li-Rong Zheng, Jouni Isoaho, Hannu Tenhunen: Modeling of On-Chip Bus Switching Current and Its Impact on Noise in Power Supply Grid. IEEE Trans. VLSI Syst. 16(6): 766-770 (2008)
37		Muhammad Imran Anwar, Seppo Virtanen, Jouni Isoaho: A software defined approach for common baseband processing. Journal of Systems Architecture - Embedded Systems Design 54(8): 769-786 (2008)
	2007
36		Pekka Rantala, Jouni Isoaho, Hannu Tenhunen: Novel Agent-Based Management for Fault-Tolerance in Network-on-Chip. DSD 2007: 551-555
35		Pekka Rantala, Jouni Isoaho, Hannu Tenhunen: Agent-Based Reconfigurability for Fault-Tolerance in Network-on-Chip. ERSA 2007: 207-210
34		Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Current Mode On-Chip Interconnect using Level-Encoded Two-Phase Dual-Rail Encoding. ISCAS 2007: 649-652
33		Ethiopia Nigussie, Teijo Lehtonen, Sampo Tuuna, Juha Plosila, Jouni Isoaho: High-Performance Long NoC Link Using Delay-Insensitive Current-Mode Signaling. VLSI Design 2007: (2007)
	2006
32		Tuomo Saarni, Jyri Paakkulainen, Tuomas Mäkilä, Jussi Hakokari, Olli Aaltonen, Jouni Isoaho, Tapio Salakoski: Implementing a Rule-Based Speech Synthesizer on a Mobile Platform. FinTAL 2006: 349-355
31		Tuomo Saarni, Jussi Hakokari, Jouni Isoaho, Olli Aaltonen, Tapio Salakoski: Segmental Duration in Utterance-Initial Environment: Evidence from Finnish Speech Corpora. FinTAL 2006: 576-584
30		Annu Paganus, Vesa-Petteri Mikkonen, Tomi Mäntylä, Sami Nuuttila, Jouni Isoaho, Olli Aaltonen, Tapio Salakoski: The Vowel Game: Continuous Real-Time Visualization for Pronunciation Learning with Vowel Charts. FinTAL 2006: 696-703
29		Teijo Lehtonen, Pekka Rantala, P. Isomaki, Juha Plosila, Jouni Isoaho: An approach for analysing and improving fault tolerance in radio architectures. ISCAS 2006
28		Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Full-duplex link implementation using dual-rail encoding and multiple-valued current-mode logic. ISCAS 2006
27		Ethiopia Nigussie, Juha Plosila, Jouni Isoaho: Delay-Insensitive On-Chip Communication Link using Low-Swing Simultaneous Bidirectional Signaling. ISVLSI 2006: 217-224
26		Sampo Tuuna, Jouni Isoaho, Hannu Tenhunen: Analytical model for crosstalk and intersymbol interference in point-to-point buses. IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1400-1410 (2006)
	2005
25		Seppo Virtanen, Dragos Truscan, Jani Paakkulainen, Jouni Isoaho, Johan Lilius: Highly Automated FPGA Synthesis of Application-Specific Protocol Processors. FPL 2005: 269-274
24		Juha Plosila, Pasi Liljeberg, Jouni Isoaho: Modelling and Refinement of an On-Chip Communication Architecture. ICFEM 2005: 219-234
23		Meigen Shen, Li-Rong Zheng, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen: Case study of interconnect analysis for standing wave oscillator design. ISCAS (1) 2005: 456-459
22		Meigen Shen, Li-Rong Zheng, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen: Concurrent Chip Package Design for Global Clock Distribution Network Using Standing Wave Approach. ISQED 2005: 573-578
21		Jari Nurmi, Jan Madsen, Erwin Ofner, Jouni Isoaho, Hannu Tenhunen: The SoC-Mobinet Model in System-on-Chip Education. MSE 2005: 71-72
20		Jani Paakkulainen, Seppo Virtanen, Jouni Isoaho: Tuning a Protocol Processor Architecture Towards DSP Operations. SAMOS 2005: 132-141
	2004
19		Pasi Liljeberg, Juha Plosila, Jouni Isoaho: Self-timed communication platform for implementing high-performance systems-on-chip. Integration 38(1): 43-67 (2004)
	2003
18		Maria Alaranta, Tuomas Valtonen, Jouni Isoaho: Software for the Changing E-Business. I3E 2003: 103-115
17		Tapani Ahonen, Tero Nurmi, Jari Nurmi, Jouni Isoaho: Block-wise Extraction of Rent's Exponents for an Extensible Processor. ISVLSI 2003: 193-202
16		Sampo Tuuna, Jouni Isoaho: Estimation of Crosstalk Noise for On-Chip Buses. PATMOS 2003: 111-120
15		Johanna Tuominen, Pasi Liljeberg, Jouni Isoaho: Self-Timed Approach for Reducing On-Chip Switching Noise. VLSI-SOC 2003: 19-24
	2002
14		Tuomas Valtonen, Jouni Isoaho, Hannu Tenhunen: The Case for Fine-Grained Re-configurable Architectures: An Analysis of Conceived Performance. FPL 2002: 816-825
13		Tuomas Valtonen, Tero Nurmi, Jouni Isoaho, Hannu Tenhunen: Interconnection of autonomous error-tolerant cells. ISCAS (4) 2002: 473-476
12		Pasi Liljeberg, Imed Ben Dhaou, Juha Plosila, Jouni Isoaho, Hannu Tenhunen: Interconnect peak current reduction for wavelet array processor using self-timed signaling. ISCAS (4) 2002: 485-488
	2001
11		Pasi Liljeberg, Juha Plosila, Jouni Isoaho: Asynchronous interface for locally clocked modules in ULSI systems. ISCAS (4) 2001: 170-173
10		T. Santti, Jouni Isoaho: Modified SRCMOS cell for high-throughput wave-pipelined arithmetic units. ISCAS (4) 2001: 194-197
9		T. Suutari, Jouni Isoaho, Hannu Tenhunen: High-speed serial communication with error correction using 0.25 um CMOS technology. ISCAS (4) 2001: 618-621
	1999
8		Lihong Jia, Yonghong Gao, Jouni Isoaho, Hannu Tenhunen: Design of a super-pipelined Viterbi decoder. ISCAS (1) 1999: 133-136
7		L. Horvath, Imed Ben Dhaou, Hannu Tenhunen, Jouni Isoaho: A novel, high-speed, reconfigurable demapper-symbol deinterleaver architecture for DVB-T. ISCAS (4) 1999: 382-385
6		M. Kivioja, Jouni Isoaho, L. Vänskä: Design and Implementation of Viterbi Decoder with FPGAs. VLSI Signal Processing 21(1): 5-14 (1999)
	1996
5		Johnny Öberg, Jouni Isoaho, Peeter Ellervee, Axel Jantsch, Ahmed Hemani: A Rule-Based Approach for Improving Allocation of Filter Structures in HLS. VLSI Design 1996: 133-139
	1994
4		Jouni Isoaho, Axel Jantsch, Hannu Tenhunen: DSP Development with Full-Speed Prototyping Based on HW/SW Codesign Techniques. FPL 1994: 318-320
3		Jouni Isoaho, Jari Nurmi: An Overall FIR Filter Optimization Tool for High Granularity Implementation Technologies. ISCAS 1994: 265-268
	1993
2		Jouni Isoaho, Jari Pasanen, Olli Vainio, Hannu Tenhunen: DSP system integration and prototyping with FPGAS. VLSI Signal Processing 6(2): 155-172 (1993)
	1992
1		Jouni Isoaho, Arto Nummela, Hannu Tenhunen: Technologies and Utilization fo Field Programmable Gate Arrays. FPL 1992: 11-25

Coauthor Index

1	Olli Aaltonen	[30] [31] [32]
2	Tapani Ahonen	[17]
3	Maria Alaranta	[18]
4	Muhammad Imran Anwar	[37]
5	Imed Ben Dhaou	[7] [12]
6	Peeter Ellervee	[5]
7	Yonghong Gao	[8]
8	Liang Guang	[44] [45] [46] [48] [52]
9	Jussi Hakokari	[31] [32] [42] [43]
10	Miska M. Hannuksela	[39]
11	Ahmed Hemani	[5]
12	Heidi Himmanen	[39]
13	L. Horvath	[7]
14	P. Isomaki	[29]
15	Axel Jantsch	[4] [5]
16	Lihong Jia	[8]
17	M. Kivioja	[6]
18	Teppo Kurki	[39]
19	Teijo Lehtonen	[29] [33]
20	Johan Lilius	[25]
21	Pasi Liljeberg	[11] [12] [15] [19] [24] [44]
22	Jan Madsen	[21]
23	Tuomas Mäkilä	[32]
24	Tomi Mäntylä	[30]
25	Vesa-Petteri Mikkonen	[30]
26	Ethiopia Nigussie	[27] [28] [33] [34] [41] [44] [45] [48] [49] [50] [54]
27	Arto Nummela	[1]
28	Jari Nurmi	[3] [17] [21]
29	Tero Nurmi	[13] [17]
30	Sami Nuuttila	[30]
31	Johnny Öberg	[5]
32	Erwin Ofner	[21]
33	Jani Paakkulainen	[20] [25]
34	Jyri Paakkulainen	[32]
35	Annu Paganus	[30]
36	Jari Pasanen	[2]
37	Juha Plosila	[11] [12] [19] [24] [27] [28] [29] [33] [34] [41] [46] [47] [49] [50] [52]
38	Pekka Rantala	[29] [35] [36] [45] [48] [51]
39	Tuomo Saarni	[31] [32] [42] [43]
40	Tapio Salakoski	[30] [31] [32] [42] [43]
41	T. Santti	[10]
42	Meigen Shen	[22] [23]
43	T. Suutari	[9]
44	Hannu Tenhunen	[1] [2] [4] [7] [8] [9] [12] [13] [14] [21] [22] [23] [26] [35] [36] [38] [40] [44] [45] [46] [48] [52] [53] [54]
45	Esa Tjukanoff	[22] [23]
46	Dragos Truscan	[25]
47	Johanna Tuominen	[15]
48	Sampo Tuuna	[16] [26] [33] [38] [40] [53] [54]
49	Olli Vainio	[2]
50	Tuomas Valtonen	[13] [14] [18]
51	L. Vänskä	[6]
52	Seppo Virtanen	[20] [25] [37] [47] [51]
53	Bo Yang	[52]
54	Alexander Wei Yin	[44]
55	Li-Rong Zheng	[22] [23] [38]

Colors in the list of coauthors

Last update Fri Jun 1 15:44:53 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page