Shota Ishihara

	2011
12		Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama: An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture. ASP-DAC 2011: 89-90
11		Shota Ishihara, Masanori Hariyama, Michitaka Kameyama: A Low-Power FPGA Based on Autonomous Fine-Grain Power Gating. IEEE Trans. VLSI Syst. 19(8): 1394-1406 (2011)
10		Shota Ishihara, Ryoto Tsuchiya, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama: Implementation of a Low-Power FPGA Based on Synchronous/Asynchronous Hybrid Architecture. IEICE Transactions 94-C(10): 1669-1679 (2011)
9		Shota Ishihara, Noriaki Idobata, Yoshihiro Nakatani, Masanori Hariyama: A Switch Block for Multi-Context FPGAs Based on Floating-Gate-MOS Functional Pass-Gates Using Multiple/Binary Valued Hybrid Signals? Multiple-Valued Logic and Soft Computing 17(5-6): 553-580 (2011)
	2010
8		Masanori Hariyama, Ryoto Tsuchiya, Shota Ishihara, Michitaka Kameyama: An Field-Programmable VLSI Based on Synchronous/Asynchronous Hybrid Architecture. ERSA 2010: 271-274
7		Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama: An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture. IEICE Transactions 93-C(8): 1338-1348 (2010)
6		Shota Ishihara, Noriaki Idobata, Masanori Hariyama, Michitaka Kameyama: A Switch Block Architecture for Multi-Context FPGAs Based on a Ferroelectric-Capacitor Functional Pass-Gate Using Multiple/Binary Valued Hybrid Signals. IEICE Transactions 93-D(8): 2134-2144 (2010)
	2009
5		Shota Ishihara, Masanori Hariyama, Michitaka Kameyama: A low-power FPGA based on autonomous fine-grain power-gating. ASP-DAC 2009: 119-120
4		Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama: An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail Protocol Converters. ERSA 2009: 145-150
3		Shota Ishihara, Noriaki Idobata, Masanori Hariyama, Michitaka Kameyama: A Fine-Grain SIMD Architecture Based on Flexible Ferroelectric-Capacitor Logic. ERSA 2009: 271-274
	2008
2		Masanori Hariyama, Shota Ishihara, Noriaki Idobata, Michitaka Kameyama: Non-Volatile Multi-Context FPGAs Using Hybrid Multiple-Valued/Binary Context Switching Signals. ERSA 2008: 309-310
1		Masanori Hariyama, Shota Ishihara, Michitaka Kameyama: Evaluation of a Field-Programmable VLSI Based on an Asynchronous Bit-Serial Architecture. IEICE Transactions 91-C(9): 1419-1426 (2008)

Coauthor Index

1	Masanori Hariyama	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
2	Noriaki Idobata	[2] [3] [6] [9]
3	Michitaka Kameyama	[1] [2] [3] [4] [5] [6] [7] [8] [10] [11] [12]
4	Yoshiya Komatsu	[4] [7] [10] [12]
5	Yoshihiro Nakatani	[9]
6	Ryoto Tsuchiya	[8] [10]

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