 | 2011 |
| 12 |  | Hidetsugu Irie,
Takefumi Miyoshi,
Goki Honjo,
Kei Hiraki,
Tsutomu Yoshinaga:
CCCPO: Robust Prefetcher Optimization Technique Based on Cache Convection.
ICNC 2011: 127-133 |
| 11 |  | Junichi Ohmura,
Akira Egashira,
Shunji Satoh,
Takefumi Miyoshi,
Hidetsugu Irie,
Tsutomu Yoshinaga:
Multi-GPU Acceleration of Optical Flow Computation in Visual Functional Simulation.
ICNC 2011: 228-234 |
| 10 |  | Junichi Ohmura,
Takefumi Miyoshi,
Hidetsugu Irie,
Tsutomu Yoshinaga:
Computation-Communication Overlap of Linpack on a GPU-Accelerated PC Cluster.
IEICE Transactions 94-D(12): 2319-2327 (2011) |
| 9 |  | Cisse Ahmadou Dit Adi,
Hiroki Matsutani,
Michihiro Koibuchi,
Hidetsugu Irie,
Takefumi Miyoshi,
Tsutomu Yoshinaga:
An Efficient Path Setup for a Hybrid Photonic Network-on-Chip.
IJNC 1(2): 244-259 (2011) |
| 2010 |
| 8 |  | Cisse Ahmadou Dit Adi,
Hiroki Matsutani,
Michihiro Koibuchi,
Hidetsugu Irie,
Takefumi Miyoshi,
Tsutomu Yoshinaga:
An Efficient Path Setup for a Photonic Network-on-Chip.
ICNC 2010: 156-161 |
| 7 |  | Qin Wang,
Junichi Ohmura,
Shan Axida,
Takefumi Miyoshi,
Hidetsugu Irie,
Tsutomu Yoshinaga:
Parallel Matrix-Matrix Multiplication Based on HPL with a GPU-Accelerated PC Cluster.
ICNC 2010: 243-248 |
| 6 |  | Takefumi Miyoshi,
Kenji Kise,
Hidetsugu Irie,
Tsutomu Yoshinaga:
CODIE: Continuation-Based Overlapping Data-Transfers with Instruction Execution.
ICNC 2010: 71-77 |
| 2008 |
| 5 |  | Shinobu Miwa,
Hironori Ichibayashi,
Hidetsugu Irie,
Masahiro Goshima,
Hironori Nakajo,
Shinji Tomita:
Low-Complexity Bypass Network Using Small RAM.
CDES 2008: 153-159 |
| 4 |  | Shuichi Sakai,
Masahiro Goshima,
Hidetsugu Irie:
Ultra Dependable Processor.
IEICE Transactions 91-C(9): 1386-1393 (2008) |
| 2007 |
| 3 |  | Luong Dinh Hung,
Hidetsugu Irie,
Masahiro Goshima,
Shuichi Sakai:
Utilization of SECDED for soft error and variation-induced defect tolerance in caches.
DATE 2007: 1134-1139 |
| 2 |  | Hidetsugu Irie,
Ken Sugimoto,
Masahiro Goshima,
Shuichi Sakai:
Preventing timing errors on register writes: mechanisms of detections and recoveries.
SIGARCH Computer Architecture News 35(5): 25-31 (2007) |
| 2006 |
| 1 |  | Satoshi Katsunuma,
Hiroyuki Kurita,
Ryota Shioya,
Kazuto Shimizu,
Hidetsugu Irie,
Masahiro Goshima,
Shuichi Sakai:
Base Address Recognition with Data Flow Tracking for Injection Attack Detection.
PRDC 2006: 165-172 |