![]() | ![]() |
| 2011 | ||
|---|---|---|
| 14 | Adrian M. Ionescu, Christofer Hierold: Guardian Angels for a Smarter Life: Enabling a Zero-Power Technological Platform for Autonomous Smart Systems. Procedia CS 7: 43-46 (2011) | |
| 2010 | ||
| 13 | Montserrat Fernandez-Bolaños, Adrian M. Ionescu: 3D heterogeneous integration for novel functionality. 3DIC 2010: 1-19 | |
| 2009 | ||
| 12 | Marius Enachescu, Sorin Cotofana, Arjan J. van Genderen, Dimitrios Tsamados, Adrian M. Ionescu: Can SG-FET Replace FET in Sleep Mode Circuits? NanoNet 2009: 99-104 | |
| 2008 | ||
| 11 | Yogesh Singh Chauhan, Dimitrios Tsamados, Nicolas Abelé, C. Eggimann, Michel J. Declercq, Adrian M. Ionescu: Compact Modeling of Suspended Gate FET. VLSI Design 2008: 119-124 | |
| 10 | Nicolas Abelé, D. Grogg, C. Hibert, F. Casset, Pascal Ancey, Adrian M. Ionescu: 0-level Vacuum Packaging RT Process for MEMS Resonators CoRR abs/0802.3093: (2008) | |
| 9 | M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli: Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2053-2067 (2008) | |
| 2007 | ||
| 8 | M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli: Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays. ICCAD 2007: 765-772 | |
| 7 | Yogesh Singh Chauhan, François Krummenacher, Renaud Gillon, Benoit Bakeroot, Michel J. Declercq, Adrian M. Ionescu: A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling. VLSI Design 2007: 177-182 | |
| 2005 | ||
| 6 | Sorin Cotofana, Alexandre Schmid, Yusuf Leblebici, Adrian M. Ionescu, Oliver Soffke, Peter Zipf, Manfred Glesner, A. Rubio: CONAN - A Design Exploration Framework for Reliable Nano-Electronics. ASAP 2005: 260-267 | |
| 2004 | ||
| 5 | Anirban Basu, Sheng-Chih Lin, Christoph Wasshuber, Adrian M. Ionescu, Kaustav Banerjee: A Comprehensive Analytical Capacitance Model of a Two Dimensional Nanodot Array. ISQED 2004: 259-264 | |
| 2003 | ||
| 4 | Santanu Mahapatra, Kaustav Banerjee, Florent Pegeon, Adrian M. Ionescu: A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits. ICCAD 2003: 497-503 | |
| 2002 | ||
| 3 | Adrian M. Ionescu, Michel J. Declercq, Santanu Mahapatra, Kaustav Banerjee, Jacques Gautier: Few electron devices: towards hybrid CMOS-SET integrated circuits. DAC 2002: 88-93 | |
| 2 | Santanu Mahapatra, Adrian M. Ionescu, Kaustav Banerjee, Michel J. Declercq: A SET quantizer circuit aiming at digital communication system. ISCAS (5) 2002: 860-863 | |
| 1 | Adrian M. Ionescu, V. Pott, R. Fritschi, Kaustav Banerjee, Michel J. Declercq, P. Renaud, C. Hibert, Philippe Flückiger, G. A. Racine: Modeling and Design of a Low-Voltage SOI Suspended-Gate MOSFET (SG-MOSFET) with a Metal-over-Gate Architecture. ISQED 2002: 496-501 | |
Colors in the list of coauthors
Last update Sat Jun 2 20:57:36 2012 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page