![]() | ![]() |
| 2002 | ||
|---|---|---|
| 3 | Sadahiro Tani, Yoshihiro Uchida, Makoto Furuie, Shuji Tsukiyama, BuYeol Lee, Shuji Nishi, Yasushi Kubota, Isao Shirakawa, S. Imai: Parasitic capacitance modeling for multilevel interconnects. APCCAS (1) 2002: 59-64 | |
| 1999 | ||
| 2 | Y. Sugimoto, S. Imai: The design of a 1 V, 40 MHz, current-mode sample-and-hold circuit with 10-bit linearity. ISCAS (2) 1999: 132-135 | |
| 1 | T. Yamada, S. Imai, S. Ueno: On VLSI decompositions for deBruijn graphs. ISCAS (6) 1999: 165-169 | |
| 1 | Makoto Furuie | [3] |
| 2 | Yasushi Kubota | [3] |
| 3 | BuYeol Lee | [3] |
| 4 | Shuji Nishi | [3] |
| 5 | Isao Shirakawa | [3] |
| 6 | Y. Sugimoto | [2] |
| 7 | Sadahiro Tani | [3] |
| 8 | Shuji Tsukiyama | [3] |
| 9 | Yoshihiro Uchida | [3] |
| 10 | S. Ueno | [1] |
| 11 | T. Yamada | [1] |
Colors in the list of coauthors
Last update Fri Jun 1 15:44:53 2012 CET by the DBLP Team —
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