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 | 2003 | |
|---|---|---|
| 6 |      | Yonghee Im, Kaushik Roy: A logic-aware layout methodology to enhance the noise immunity of domino circuits. ISCAS (5) 2003: 637-640 |
| 5 | | Yonghee Im, Kaushik Roy: LALM: A Logic-Aware Layout Methodology to Enhance the Noise Immunity of Domino Circuits. ISVLSI 2003: 45-54 |
| 2002 | ||
| 4 | | Yonghee Im, Kaushik Roy: O2ABA: a novel high-performance predictable circuit architecture for the deep submicron era. IEEE Trans. VLSI Syst. 10(3): 221-229 (2002) |
| 2001 | ||
| 3 | | Bipul Chandra Paul, Seung Hoon Choi, Yonghee Im, Kaushik Roy: Design Verification and Robust Design Technique for Cross-Talk Faults. Asian Test Symposium 2001: 449- |
| 2 | | Yonghee Im, Kaushik Roy: CASh: A Novel "Clock as Shield" Design Methodology for Noise Immune Precharge-Evaluate Logic. ICCAD 2001: 337- |
| 1997 | ||
| 1 |  | Yonghee Im, Oh-Sang Kwon: An Advanced VLSI Architecture of RS Decoders for Advanced TV. ICC (3) 1997: 1346-1350 |
| 1 | Seung Hoon Choi | [3] |
| 2 | Oh-Sang Kwon | [1] |
| 3 | Bipul Chandra Paul (Bipul C. Paul) | [3] |
| 4 | Kaushik Roy | [2] [3] [4] [5] [6] |
Colors in the list of coauthors
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