Toyohito Ikeya

	2001
2		Yasuo Sato, M. Sato, K. Tsutsumida, Toyohito Ikeya, M. Kawashima: A Practical Logic BIST for ASIC Designs. Asian Test Symposium 2001: 457
	2000
1		Yasuo Sato, Toyohito Ikeya, Michinobu Nakao, Takaharu Nagumo: A BIST approach for very deep sub-micron (VDSM) defects. ITC 2000: 283-291

Coauthor Index

1	M. Kawashima	[2]
2	Takaharu Nagumo	[1]
3	Michinobu Nakao	[1]
4	M. Sato	[2]
5	Yasuo Sato	[1] [2]
6	K. Tsutsumida	[2]

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