Kenichi Ichino

	2008
5		Masayuki Sato, Hiroki Wakamatsu, Masayuki Arai, Kenichi Ichino, Kazuhiko Iwasaki, Takeshi Asakawa: Tester Structure Expression Language and Its Application to the Environment for VLSI Tester Program Development. JIPS 4(4): 121-132 (2008)
	2004
4		Masayuki Arai, Harunobu Kurokawa, Kenichi Ichino, Satoshi Fukumoto, Kazuhiko Iwasaki: Seed Selection Procedure for LFSR-Based BIST with Multiple Scan Chains and Phase Shifters. Asian Test Symposium 2004: 190-195
3		Kenichi Ichino, Ko-ichi Watanabe, Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki: Application of Partially Rotational Scan Technique with Tester IP for Processor Circuits. IEICE Transactions 87-D(3): 586-591 (2004)
	2003
2		Yuki Yamagata, Kenichi Ichino, Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki, Masayuki Satoh, Hiroyuki Itabashi, Takashi Murai, Nobuyuki Otsuka: Implementation of Memory Tester Consisting of SRAM-Based Reconfigurable Cells. Asian Test Symposium 2003: 28-31
	2001
1		Kenichi Ichino, Takeshi Asakawa, Satoshi Fukumoto, Kazuhiko Iwasaki, Seiji Kajihara: Hybrid BIST Using Partially Rotational Scan. Asian Test Symposium 2001: 379-384

Coauthor Index

1	Masayuki Arai	[2] [3] [4] [5]
2	Takeshi Asakawa	[1] [5]
3	Satoshi Fukumoto	[1] [2] [3] [4]
4	Hiroyuki Itabashi	[2]
5	Kazuhiko Iwasaki	[1] [2] [3] [4] [5]
6	Seiji Kajihara	[1]
7	Harunobu Kurokawa	[4]
8	Takashi Murai	[2]
9	Nobuyuki Otsuka	[2]
10	Masayuki Sato	[5]
11	Masayuki Satoh	[2]
12	Hiroki Wakamatsu	[5]
13	Ko-ichi Watanabe	[3]
14	Yuki Yamagata	[2]

Last update Sat Jun 2 20:57:36 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page