Pablo Ibáñez

Pablo E. Ibáñez

	2012
18		Pablo García-Risueño, Pablo E. Ibáñez: A review of High Performance Computing foundations for scientists CoRR abs/1205.5177: (2012)
17		Benjamín Sahelices Fernández, Agustín De Dios Hernández, Pablo Ibáñez, Víctor Viñals Yúfera, José María Llabería: Effcient Handling of Lock Hand-off in DSM Multiprocessors with Buffering Coherence Controllers. J. Comput. Sci. Technol. 27(1): 75-91 (2012)
16		Jorge Albericio, Ruben Gran Tejero, Pablo Ibáñez, Víctor Viñals, José María Llabería: ABS: A low-cost adaptive controller for prefetching in a banked shared last-level cache. TACO 8(4): 19 (2012)
	2011
15		Ana Bosque, Víctor Viñals, Pablo Ibáñez, José María Llabería: Filtering Directory Lookups in CMPs with Write-Through Caches. Euro-Par (1) 2011: 269-281
14		Ana Bosque, Víctor Viñals, Pablo Ibáñez, José M. Llabería: Filtering directory lookups in CMPs. Microprocessors and Microsystems - Embedded Hardware Design 35(8): 695-707 (2011)
	2010
13		Ana Bosque, Víctor Viñals, Pablo Ibáñez, José M. Llabería: Filtering Directory Lookups in CMPs. DSD 2010: 207-216
	2009
12		Benjamín Sahelices Fernández, Pablo Ibáñez, Víctor Viñals, José María Llabería: A Methodology to Characterize Critical Section Bottlenecks in DSM Multiprocessors. Euro-Par 2009: 149-161
11		Enrique F. Torres, Pablo Ibáñez, Víctor Viñals Yúfera, José María Llabería: Store Buffer Design for Multibanked Data Caches. IEEE Trans. Computers 58(10): 1307-1320 (2009)
	2008
10		Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals: Low-Cost Adaptive Data Prefetching. Euro-Par 2008: 327-336
	2007
9		Luis M. Ramos, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals: Data prefetching in a cache hierarchy with high bandwidth and capacity. SIGARCH Computer Architecture News 35(4): 37-44 (2007)
	2006
8		Agustín De Dios Hernández, Benjamín Sahelices Fernández, Pablo Ibáñez, Víctor Viñals, José M. Llabería: Speeding-Up Synchronizations in DSM Multiprocessors. Euro-Par 2006: 473-484
7		Jesús Alastruey, José Luis Briz, Pablo Ibáñez, Víctor Viñals: Software Demand, Hardware Supply. IEEE Micro 26(4): 72-82 (2006)
	2005
6		Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería: Store Buffer Design in First-Level Multibanked Data Caches. ISCA 2005: 469-480
	2004
5		Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería: Contents Management in First-Level Multibanked Data Caches. Euro-Par 2004: 516-524
	2003
4		Enrique F. Torres, Pablo Ibáñez, Víctor Viñals, José María Llabería: Counteracting Bank Misprediction in Sliced First-Level Caches. Euro-Par 2003: 586-596
	2001
3		María Jesús Garzarán, José Luis Briz, Pablo E. Ibáñez, Víctor Viñals: Hardware Prefetching in Bus-Based Multiprocessors: Pattern Characterization and Cost-Effective Hardware. PDP 2001: 345-354
	1998
2		Pablo Ibáñez, Víctor Viñals, José Luis Briz, María Jesús Garzarán: Characterization and Improvement of Load/Store Cache-based Prefetching. International Conference on Supercomputing 1998: 369-376
	1996
1		Pablo Ibáñez, Víctor Viñals: Performance Assessment of Contents Management in Multilevel On-Chip Caches. EUROMICRO 1996: 431-440

Coauthor Index

1	Jesús Alastruey	[7]
2	Jorge Albericio	[16]
3	Ana Bosque	[13] [14] [15]
4	José Luis Briz	[2] [3] [7] [9] [10]
5	Benjamín Sahelices Fernández	[8] [12] [17]
6	Pablo García-Risueño	[18]
7	María Jesús Garzarán	[2] [3]
8	Agustín De Dios Hernández	[8] [17]
9	José María Llabería (José M. Llabería)	[4] [5] [6] [8] [11] [12] [13] [14] [15] [16] [17]
10	Luis M. Ramos	[9] [10]
11	Ruben Gran Tejero	[16]
12	Enrique F. Torres	[4] [5] [6] [11]
13	Víctor Viñals (Víctor Viñals Yúfera)	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17]

Colors in the list of coauthors

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