 | 2011 |
| 3 |  | John Barth,
Don Plass,
Erik Nelson,
Charlie Hwang,
Gregory Fredeman,
Michael Sperling,
Abraham Mathews,
Toshiaki Kirihata,
William R. Reohr,
Kavita Nair,
Nianzheng Caon:
A 45 nm SOI Embedded DRAM Macro for the POWER™ Processor 32 MByte On-Chip L3 Cache.
J. Solid-State Circuits 46(1): 64-75 (2011) |
| 2010 |
| 2 |  | John Barth,
Don Plass,
Erik Nelson,
Charlie Hwang,
Gregory Fredeman,
Michael Sperling,
Abraham Mathews,
William R. Reohr,
Kavita Nair,
N. Cao:
A 45nm SOI embedded DRAM macro for POWER7TM 32MB on-chip L3 cache.
ISSCC 2010: 342-343 |
| 2007 |
| 1 |  | Brian W. Curran,
Eric Fluhr,
Jose Paredes,
Leon J. Sigal,
Joshua Friedrich,
Yiu-Hing Chan,
Charlie Hwang:
Power-constrained high-frequency circuits for the IBM POWER6 microprocessor.
IBM Journal of Research and Development 51(6): 715-732 (2007) |