Yerang Hur

	2010
11		Madhukar Anand, Sebastian Fischmeister, Yerang Hur, Jesung Kim, Insup Lee: Generating Reliable Code from Hybrid-Systems Models. IEEE Trans. Computers 59(9): 1281-1294 (2010)
	2009
10		Yerang Hur, Jae-Hwan Sim, Jesung Kim, Jin-Young Choi: Ensuring Sound Numerical Simulation of Hybrid Automata. JCSE 3(2): 73-87 (2009)
	2004
9		Yerang Hur, Jesung Kim, Insup Lee, Jin-Young Choi: Sound Code Generation from Communicating Hybrid Models. HSCC 2004: 432-447
	2003
8		Yerang Hur, Rafael B. Fierro, Insup Lee: Modeling Distributed Autonomous Robots Using CHARON: Formation Control Case Study. ISORC 2003: 93-98
7		Rajeev Alur, Thao Dang, Joel M. Esposito, Yerang Hur, Franjo Ivancic, Vijay Kumar, Insup Lee, Pradyumna Mishra, George J. Pappas, Oleg Sokolsky: Hierarchical modeling and analysis of embedded systems. Proceedings of the IEEE 91(1): 11-28 (2003)
	2002
6		Yerang Hur, Insup Lee: Distributed Simulation of Multi-Agent Hybrid Systems. Symposium on Object-Oriented Real-Time Distributed Computing 2002: 356-364
5		Rafael B. Fierro, Aveek K. Das, John R. Spletzer, Joel M. Esposito, Vijay Kumar, James P. Ostrowski, George J. Pappas, Camillo J. Taylor, Yerang Hur, Rajeev Alur, Insup Lee, Gregory Z. Grudic, Ben Southall: A Framework and Architecture for Multi-Robot Coordination. I. J. Robotic Res. 21(10-11): 977-998 (2002)
	2001
4		Rajeev Alur, Thao Dang, Joel M. Esposito, Rafael B. Fierro, Yerang Hur, Franjo Ivancic, Vijay Kumar, Insup Lee, Pradyumna Mishra, George J. Pappas, Oleg Sokolsky: Hierarchical Hybrid Modeling of Embedded Systems. EMSOFT 2001: 14-31
	2000
3		Rajeev Alur, Radu Grosu, Yerang Hur, Vijay Kumar, Insup Lee: Modular Specification of Hybrid Systems in CHARON. HSCC 2000: 6-19
2		Rajeev Alur, Aveek K. Das, Joel M. Esposito, Rafael B. Fierro, Gregory Z. Grudic, Yerang Hur, Vijay Kumar, Insup Lee, J. P. Lee, James P. Ostrowski, George J. Pappas, Ben Southall, John R. Spletzer, Camillo J. Taylor: A Framework and Architecture for Multirobot Coordination. ISER 2000: 303-312
	1995
1		Yerang Hur, Young Hyun Bae, Sung-Soo Lim, Sung-Kwan Kim, Byung-Do Rhee, Sang Lyul Min, Chang Yun Park, Heonshik Shin, Chong-Sang Kim: Worst Case Timing Analysis of RISC Processors: R3000/R3010 Case Study. IEEE Real-Time Systems Symposium 1995: 308-321

Coauthor Index

1	Rajeev Alur	[2] [3] [4] [5] [7]
2	Madhukar Anand	[11]
3	Young Hyun Bae	[1]
4	Jin-Young Choi	[9] [10]
5	Thao Dang	[4] [7]
6	Aveek K. Das	[2] [5]
7	Joel M. Esposito	[2] [4] [5] [7]
8	Rafael B. Fierro	[2] [4] [5] [8]
9	Sebastian Fischmeister	[11]
10	Radu Grosu	[3]
11	Gregory Z. Grudic	[2] [5]
12	Franjo Ivancic	[4] [7]
13	Chong-Sang Kim	[1]
14	Jesung Kim	[9] [10] [11]
15	Sung-Kwan Kim	[1]
16	Vijay Kumar	[2] [3] [4] [5] [7]
17	Insup Lee	[2] [3] [4] [5] [6] [7] [8] [9] [11]
18	J. P. Lee	[2]
19	Sung-Soo Lim	[1]
20	Sang Lyul Min	[1]
21	Pradyumna Mishra	[4] [7]
22	James P. Ostrowski	[2] [5]
23	George J. Pappas	[2] [4] [5] [7]
24	Chang Yun Park	[1]
25	Byung-Do Rhee	[1]
26	Heonshik Shin	[1]
27	Jae-Hwan Sim	[10]
28	Oleg Sokolsky	[4] [7]
29	Ben Southall	[2] [5]
30	John R. Spletzer	[2] [5]
31	Camillo J. Taylor	[2] [5]

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