 | 2011 |
|---|
| 5 |       | Yu-Cherng Hung,
Shao-Hui Shieh,
Chiou-Kou Tung:
A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits.
Journal of Circuits, Systems, and Computers 20(1): 89-105 (2011) |
| 2009 |
|---|
| 4 | | Ching-Hwa Cheng,
Chiou-Kou Tung,
Shao-Hui Shieh,
Yu-Cherng Hung:
Design High-Performance and Low-Power Adder Cores with Full-Swing Nodes for Embedded Systems.
IIH-MSP 2009: 534-537 |
| 3 | | Yu-Cherng Hung,
Min-Ming Kuo,
Chiou-Kou Tung,
Shao-Hui Shieh:
High-Speed CMOS Chip Design for Manchester and Miller Encoder.
IIH-MSP 2009: 538-541 |
| 2007 |
|---|
| 2 |  | Chiou-Kou Tung,
Yu-Cherng Hung,
Shao-Hui Shieh,
Guo-Shing Huang:
A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System.
DDECS 2007: 199-202 |
| 2006 |
|---|
| 1 | | Chiou-Kou Tung,
Shao-Hui Shieh,
Yu-Cherng Hung,
Ming-Chien Tsai:
High-Performance Low-Power Full-Swing Full Adder Cores with Output Driving Capability.
APCCAS 2006: 614-617 |
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