Henrik Hulgaard

	2003
24		Poul Frederick Williams, Henrik Reif Andersen, Henrik Hulgaard: Satisfiability checking using Boolean Expression Diagrams. STTT 5(1): 4-14 (2003)
	2002
23		Jesper B. Møller, Henrik Hulgaard, Henrik Reif Andersen: Timed Verification of Asynchronous Circuits. Concurrency and Hardware Design 2002: 274-312
22		Gerd Behrmann, Kim Guldstrand Larsen, Henrik Reif Andersen, Henrik Hulgaard, Jørn Lind-Nielsen: Verification of Hierarchical State/Event Systems using Reusability and Compositionality. Formal Methods in System Design 21(2): 225-244 (2002)
21		Henrik Reif Andersen, Henrik Hulgaard: Boolean Expression Diagrams. Inf. Comput. 179(2): 194-212 (2002)
20		Jesper B. Møller, Henrik Hulgaard, Henrik Reif Andersen: Symbolic model checking of timed guarded commands using difference decision diagrams. J. Log. Algebr. Program. 52-53: 53-77 (2002)
	2001
19		Poul Frederick Williams, Henrik Reif Andersen, Henrik Hulgaard: Satisfiability Checking Using Boolean Expression Diagrams. TACAS 2001: 39-51
18		Jørn Lind-Nielsen, Henrik Reif Andersen, Henrik Hulgaard, Gerd Behrmann, Kåre J. Kristoffersen, Kim Guldstrand Larsen: Verification of Large State/Event Systems Using Compositionality and Dependency Analysis. Formal Methods in System Design 18(1): 5-23 (2001)
	2000
17		Jørgen Staunstrup, Henrik Reif Andersen, Henrik Hulgaard, Jørn Lind-Nielsen, Kim Guldstrand Larsen, Gerd Behrmann, Kåre J. Kristoffersen, Arne Skou, Henrik Leerberg, Niels Bo Theilgaard: Practical Verification of Embedded Software. IEEE Computer 33(5): 68-75 (2000)
16		Henrik Hulgaard, Tod Amon: Symbolic timing analysis of asynchronous systems. IEEE Trans. on CAD of Integrated Circuits and Systems 19(10): 1093-1104 (2000)
	1999
15		Tod Amon, Henrik Hulgaard: Symbolic Time Separation of Events. ASYNC 1999: 83-93
14		Jesper B. Møller, Jakob Lichtenberg, Henrik Reif Andersen, Henrik Hulgaard: Difference Decision Diagrams. CSL 1999: 111-125
13		Gerd Behrmann, Kim Guldstrand Larsen, Henrik Reif Andersen, Henrik Hulgaard, Jørn Lind-Nielsen: Verification of Hierarchical State/Event Systems Using Reusability and Compositionality. TACAS 1999: 163-177
12		Jesper B. Møller, Jakob Lichtenberg, Henrik Reif Andersen, Henrik Hulgaard: Fully Symbolic Model Checking of Timed Systems using Difference Decision Diagrams. Electr. Notes Theor. Comput. Sci. 23(2): 88-107 (1999)
11		Henrik Hulgaard, Poul Frederick Williams, Henrik Reif Andersen: Equivalence checking of combinational circuits using Boolean expression diagrams. IEEE Trans. on CAD of Integrated Circuits and Systems 18(7): 903-917 (1999)
	1998
10		Fen Jin, Henrik Hulgaard, Eduard Cerny: Maximum Time Separation of Events in Cyclic Systems with Linear and Latest Timing Constraints. FMCAD 1998: 167-184
9		Jørn Lind-Nielsen, Henrik Reif Andersen, Gerd Behrmann, Henrik Hulgaard, Kåre J. Kristoffersen, Kim Guldstrand Larsen: Verification of Large State/Event Systems Using Compositionality and Dependency Analysis. TACAS 1998: 201-216
	1997
8		Henrik Reif Andersen, Henrik Hulgaard: Boolean Expression Diagrams (Extended Abstract). LICS 1997: 88-98
7		Henrik Hulgaard, Steven M. Burns: Bounded Delay Timing Analysis of a Class of CSP Programs. Formal Methods in System Design 11(3): 265-294 (1997)
	1995
6		Henrik Hulgaard, Steven M. Burns: Efficient Timing Analysis of a Class of Petri Nets. CAV 1995: 423-436
5		Henrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello: An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems. IEEE Trans. Computers 44(11): 1306-1317 (1995)
4		Henrik Hulgaard, Steven M. Burns, Gaetano Borriello: Testing asynchronous circuits: A survey. Integration 19(3): 111-131 (1995)
	1993
3		Henrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello: Practical applications of an efficient time separation of events algorithm. ICCAD 1993: 146-151
2		Tod Amon, Henrik Hulgaard, Steven M. Burns, Gaetano Borriello: An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems. ICCD 1993: 166-173
	1991
1		Henrik Hulgaard, Per H. Christensen, Jørgen Staunstrup: Synthesizing Delay Insensitive Circuits from Verified Programs. Research Directions in High-Level Parallel Programming Languages 1991: 326-337

Coauthor Index

1	Tod Amon	[2] [3] [5] [15] [16]
2	Henrik Reif Andersen	[8] [9] [11] [12] [13] [14] [17] [18] [19] [20] [21] [22] [23] [24]
3	Gerd Behrmann	[9] [13] [17] [18] [22]
4	Gaetano Borriello	[2] [3] [4] [5]
5	Steven M. Burns	[2] [3] [4] [5] [6] [7]
6	Eduard Cerny	[10]
7	Per H. Christensen	[1]
8	Fen Jin	[10]
9	Kåre J. Kristoffersen	[9] [17] [18]
10	Kim Guldstrand Larsen (Kim G. Larsen)	[9] [13] [17] [18] [22]
11	Henrik Leerberg	[17]
12	Jakob Lichtenberg	[12] [14]
13	Jørn Lind-Nielsen	[9] [13] [17] [18] [22]
14	Jesper B. Møller	[12] [14] [20] [23]
15	Arne Skou	[17]
16	Jørgen Staunstrup	[1] [17]
17	Niels Bo Theilgaard	[17]
18	Poul Frederick Williams	[11] [19] [24]

Colors in the list of coauthors

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