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| 1988 | ||
|---|---|---|
| 1 | Larry M. Augustin, Benoit A. Gennart, Youm Huh, David C. Luckham, Alec G. Stanculescu: Verification of VHDL Designs Using VAL. DAC 1988: 48-53 | |
| 1 | Larry M. Augustin | [1] |
| 2 | Benoit A. Gennart | [1] |
| 3 | David C. Luckham | [1] |
| 4 | Alec G. Stanculescu | [1] |
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