 | 2011 |
|---|
| 5 |       | Clay Hughes,
Tao Li:
Optimizing throughput/power trade-offs in hardware transactional memory using DVFS and intelligent scheduling.
ICS 2011: 141-150 |
| 2009 |
|---|
| 4 | | James Poe,
Clay Hughes,
Tao Li:
TransMetric: architecture independent workload characterization for transactional memory benchmarks.
ICS 2009: 491-492 |
| 3 | | Clay Hughes,
James Poe,
Amer Qouneh,
Tao Li:
On the (dis)similarity of transactional memory workloads.
IISWC 2009: 108-117 |
| 2 | | James Poe,
Clay Hughes,
Tao Li:
TransPlant: A parameterized methodology for generating transactional memory workloads.
MASCOTS 2009: 1-10 |
| 2008 |
|---|
| 1 | | Clay Hughes,
Tao Li:
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis.
IISWC 2008: 163-172 |
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