 | 2011 |
| 18 |  | Jungju Oh,
Christopher J. Hughes,
Guru Venkataramani,
Milos Prvulovic:
LIME: a framework for debugging load imbalance in multi-threaded execution.
ICSE 2011: 201-210 |
| 17 |  | Guangyu Sun,
Christopher J. Hughes,
Changkyu Kim,
Jishen Zhao,
Cong Xu,
Yuan Xie,
Yen-Kuang Chen:
Moguls: a model to explore the memory hierarchy for bandwidth improvements.
ISCA 2011: 377-388 |
| 16 |  | Guru Venkataramani,
Christopher J. Hughes,
Sanjeev Kumar,
Milos Prvulovic:
DeFT: Design space exploration for on-the-fly detection of coherence misses.
TACO 8(2): 8 (2011) |
| 2010 |
| 15 |  | Christopher J. Hughes,
Changkyu Kim,
Yen-Kuang Chen:
Performance and Energy Implications of Many-Core Caches for Throughput Computing.
IEEE Micro 30(6): 25-35 (2010) |
| 2008 |
| 14 |  | Sanjeev Kumar,
Daehyun Kim,
Mikhail Smelyanskiy,
Yen-Kuang Chen,
Jatin Chhugani,
Christopher J. Hughes,
Changkyu Kim,
Victor W. Lee,
Anthony D. Nguyen:
Atomic Vector Operations on Chip Multiprocessors.
ISCA 2008: 441-452 |
| 2007 |
| 13 |  | Trista Pei-chun Chen,
Dmitry Budnikov,
Christopher J. Hughes,
Yen-Kuang Chen:
Computer Vision on Multi-Core Processors: Articulated Body Tracking.
ICME 2007: 1862-1865 |
| 12 |  | Sanjeev Kumar,
Christopher J. Hughes,
Anthony D. Nguyen:
Carbon: architectural support for fine-grained parallelism on chip multiprocessors.
ISCA 2007: 162-173 |
| 11 |  | Christopher J. Hughes,
Radek Grzeszczuk,
Eftychios Sifakis,
Daehyun Kim,
Sanjeev Kumar,
Andrew Selle,
Jatin Chhugani,
Matthew J. Holliman,
Yen-Kuang Chen:
Physical simulation for animation and visual effects: parallelization and characterization for chip multiprocessors.
ISCA 2007: 220-231 |
| 2006 |
| 10 |  | Gang Wu,
Edward Y. Chang,
Yen-Kuang Chen,
Christopher J. Hughes:
Incremental approximate matrix factorization for speeding up support vector machines.
KDD 2006: 760-766 |
| 9 |  | Sanjeev Kumar,
Michael Chu,
Christopher J. Hughes,
Partha Kundu,
Anthony D. Nguyen:
Hybrid transactional memory.
PPOPP 2006: 209-220 |
| 2005 |
| 8 |  | Christopher J. Hughes,
Sarita V. Adve:
Memory-side prefetching for linked data structures for processor-in-memory systems.
J. Parallel Distrib. Comput. 65(4): 448-463 (2005) |
| 2004 |
| 7 |  | Christopher J. Hughes,
Sarita V. Adve:
A Formal Approach to Frequent Energy Adaptations for Multimedia Applications.
ISCA 2004: 138-149 |
| 2002 |
| 6 |  | Ruchira Sasanka,
Christopher J. Hughes,
Sarita V. Adve:
Joint local and global hardware adaptations for energy.
ASPLOS 2002: 144-155 |
| 5 |  | Rohit Jain,
Christopher J. Hughes,
Sarita V. Adve:
Soft Real- Time Scheduling on Simultaneous Multithreaded Processors.
IEEE Real-Time Systems Symposium 2002: 134- |
| 4 |  | Christopher J. Hughes,
Vijay S. Pai,
Parthasarathy Ranganathan,
Sarita V. Adve:
RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors.
IEEE Computer 35(2): 40-49 (2002) |
| 2001 |
| 3 |  | Jamison D. Collins,
Hong Wang,
Dean M. Tullsen,
Christopher J. Hughes,
Yong-Fong Lee,
Daniel M. Lavery,
John Paul Shen:
Speculative precomputation: long-range prefetching of delinquent loads.
ISCA 2001: 14-25 |
| 2 |  | Christopher J. Hughes,
Praful Kaul,
Sarita V. Adve,
Rohit Jain,
Chanik Park,
Jayanth Srinivasan:
Variability in the execution of multimedia applications and implications for architecture.
ISCA 2001: 254-265 |
| 1 |  | Christopher J. Hughes,
Jayanth Srinivasan,
Sarita V. Adve:
Saving energy with architectural and frequency adaptations for multimedia applications.
MICRO 2001: 250-261 |