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Mentor Graphics Corporation / University of Iowa
List of publications from the DBLP Bibliography Server - FAQother persons with the same name:
| 2010 | ||
|---|---|---|
| 37 | Ke Peng, Yu Huang, Ruifeng Guo, Wu-Tung Cheng, Mohammad Tehranipoor: Emulating and diagnosing IR-drop by using dynamic SDF. ASP-DAC 2010: 511-516 | |
| 36 | Wu-Tung Cheng, Yu Huang: Enhance Profiling-Based Scan Chain Diagnosis by Pattern Masking. Asian Test Symposium 2010: 255-260 | |
| 35 | Ke Peng, Yu Huang, Pinki Mallick, Wu-Tung Cheng, Mohammad Tehranipoor: Full-circuit SPICE simulation based validation of dynamic delay estimation. European Test Symposium 2010: 101-106 | |
| 34 | Kun-Han Tsai, Yu Huang, Wu-Tung Cheng, Ting-Pu Tai, Augusli Kifli: Test cycle power optimization for scan-based designs. ITC 2010: 134-143 | |
| 33 | Yu Huang, Brady Benware, Wu-Tung Cheng, Ting-Pu Tai, Feng-Ming Kuo, Yuan-Shih Chen: Case study of scan chain diagnosis and PFA on a low yield wafer. ITC 2010: 818 | |
| 32 | Elif Alpaslan, Yu Huang, Xijiang Lin, Wu-Tung Cheng, Jennifer Dworak: On Reducing Scan Shift Activity at RTL. IEEE Trans. on CAD of Integrated Circuits and Systems 29(7): 1110-1120 (2010) | |
| 2009 | ||
| 31 | Yu Huang, Wu-Tung Cheng, Ruifeng Guo, Ting-Pu Tai, Feng-Ming Kuo, Yuan-Shih Chen: Scan Chain Diagnosis by Adaptive Signal Profiling with Manufacturing ATPG Patterns. Asian Test Symposium 2009: 35-40 | |
| 30 | Xun Tang, Ruifeng Guo, Wu-Tung Cheng, Sudhakar M. Reddy, Yu Huang: On Improving Diagnostic Test Generation for Scan Chain Failures. Asian Test Symposium 2009: 41-46 | |
| 2008 | ||
| 29 | Yu Huang, Wu-Tung Cheng, Ruifeng Guo: Diagnose Multiple Stuck-at Scan Chain Faults. European Test Symposium 2008: 105-110 | |
| 28 | Ruifeng Guo, Liyang Lai, Yu Huang, Wu-Tung Cheng: Detection and Diagnosis of Static Scan Cell Internal Defect. ITC 2008: 1-10 | |
| 27 | Elif Alpaslan, Yu Huang, Xijiang Lin, Wu-Tung Cheng, Jennifer Dworak: Reducing Scan Shift Power at RTL. VTS 2008: 139-146 | |
| 26 | Yu Huang, Ruifeng Guo, Wu-Tung Cheng, James Chien-Mo Li: Survey of Scan Chain Diagnosis. IEEE Design & Test of Computers 25(3): 240-248 (2008) | |
| 25 | Xijiang Lin, Yu Huang: Scan Shift Power Reduction by Freezing Power Sensitive Scan Cells. J. Electronic Testing 24(4): 327-334 (2008) | |
| 2007 | ||
| 24 | Yu Huang: Dynamic learning based scan chain diagnosis. DATE 2007: 510-515 | |
| 23 | Ruifeng Guo, Yu Huang, Wu-Tung Cheng: A complete test set to diagnose scan chain failures. ITC 2007: 1-10 | |
| 22 | Yu Huang, Wu-Tung Cheng, Ruifeng Guo, Will Hsu, Yuan-Shih Chen, Albert Mann: Diagnose compound scan chain and system logic defects. ITC 2007: 1-10 | |
| 2006 | ||
| 21 | Yu Huang, Keith Gallie: Diagnosis of defects on scan enable and clock trees. DATE 2006: 436-437 | |
| 20 | Yu Huang: On N-Detect Pattern Set Optimization. ISQED 2006: 445-450 | |
| 19 | Yu Huang, Wu-Tung Cheng, Nagesh Tamarapalli, Janusz Rajski, Randy Klingenberg, Will Hsu, Yuan-Shih Chen: Diagnosis with Limited Failure Information. ITC 2006: 1-10 | |
| 2005 | ||
| 18 | Yu Huang, Wu-Tung Cheng, Greg Crowell: Using fault model relaxation to diagnose real scan chain defects. ASP-DAC 2005: 1176-1179 | |
| 17 | Yu Huang: Off-shore outsource DFT vs. build off-shore branch offices. ITC 2005: 1 | |
| 16 | Yu Huang, Wu-Tung Cheng, Janusz Rajski: Compressed pattern diagnosis for scan chain failures. ITC 2005: 8 | |
| 2004 | ||
| 15 | Wu-Tung Cheng, Kun-Han Tsai, Yu Huang, Nagesh Tamarapalli, Janusz Rajski: Compactor Independent Direct Diagnosis. Asian Test Symposium 2004: 204-209 | |
| 14 | Yu Huang, Wu-Tung Cheng, Cheng-Ju Hsieh, Huan-Yung Tseng, Alou Huang, Yu-Ting Hung: Intermittent Scan Chain Fault Diagnosis Based on Signal Probability Analysis. DATE 2004: 1072-1077 | |
| 2003 | ||
| 13 | Yu Huang, Wu-Tung Cheng, Cheng-Ju Hsieh, Huan-Yung Tseng, Alou Huang, Yu-Ting Hung: Efficient Diagnosis for Multiple Intermittent Scan Chain Hold-Time Faults. Asian Test Symposium 2003: 44-49 | |
| 12 | Yu Huang, Wu-Tung Cheng: Using embedded infrastructure IP for SOC post-silicon verification. DAC 2003: 674-677 | |
| 11 | Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Sudhakar M. Reddy: Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets. ISQED 2003: 99-104 | |
| 10 | Yu Huang, Wu-Tung Cheng, Sudhakar M. Reddy, Cheng-Ju Hsieh, Yu-Ting Hung: Statistical Diagnosis for Intermittent Scan Chain Hold-Time Fault. ITC 2003: 319-328 | |
| 9 | Wei Zou, Sudhakar M. Reddy, Irith Pomeranz, Yu Huang: SOC Test Scheduling Using Simulated Annealing. VTS 2003: 325-330 | |
| 2002 | ||
| 8 | Yu Huang, Sudhakar M. Reddy, Wu-Tung Cheng: Core - Clustering Based SOC Test Scheduling Optimization. Asian Test Symposium 2002: 405-410 | |
| 7 | Yu Huang, Sudhakar M. Reddy, Wu-Tung Cheng, Paul Reuter, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan: Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm. ITC 2002: 74-82 | |
| 6 | Yu Huang, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan, Yanping Zhang, Wu-Tung Cheng, Sudhakar M. Reddy: Constraint Driven Pin Mapping for Concurrent SOC Testing. VLSI Design 2002: 511-516 | |
| 5 | Yu Huang, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Wu-Tung Cheng, Sudhakar M. Reddy: Synthesis of Scan Chains for Netlist Descriptions at RT-Level. J. Electronic Testing 18(2): 189-201 (2002) | |
| 4 | Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan, Sudhakar M. Reddy: On Concurrent Test of Core-Based SOC Design. J. Electronic Testing 18(4-5): 401-414 (2002) | |
| 2001 | ||
| 3 | Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan, Sudhakar M. Reddy: Resource Allocation and Test Scheduling for Concurrent Test of Core-Based SoC D. Asian Test Symposium 2001: 265- | |
| 2 | Yu Huang, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Dan Devries, Wu-Tung Cheng, Sudhakar M. Reddy: On RTL scan design. ITC 2001: 728-737 | |
| 2000 | ||
| 1 | Yu Huang, Irith Pomeranz, Sudhakar M. Reddy, Janusz Rajski: Improving the Proportion of At-Speed Tests in Scan BIST. ICCAD 2000: 459-463 | |
Colors in the list of coauthors
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