Yen-Chuan Huang

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2011

4 Yen-Chuan Huang, Tai-Cheng Lee: A 10-bit 100-MS/s 4.5-mW Pipelined ADC With a Time-Sharing Technique. IEEE Trans. on Circuits and Systems 58-I(6): 1157-1166 (2011)

2010

3 Yen-Chuan Huang, Tai-Cheng Lee: A 10b 100MS/s 4.5mW pipelined ADC with a time sharing technique. ISSCC 2010: 300-301

2 Yen-Chuan Huang, Tai-Cheng Lee: A 0.02-mm ² 9-Bit 50-MS/s Cyclic ADC in 90-nm Digital CMOS Technology. J. Solid-State Circuits 45(3): 610-619 (2010)

2005

1 Tai-Cheng Lee, Yen-Chuan Huang: An optimization technique for RF buffers with active inductors. ISCAS (4) 2005: 3692-3695

	2011
4		Yen-Chuan Huang, Tai-Cheng Lee: A 10-bit 100-MS/s 4.5-mW Pipelined ADC With a Time-Sharing Technique. IEEE Trans. on Circuits and Systems 58-I(6): 1157-1166 (2011)
	2010
3		Yen-Chuan Huang, Tai-Cheng Lee: A 10b 100MS/s 4.5mW pipelined ADC with a time sharing technique. ISSCC 2010: 300-301
2		Yen-Chuan Huang, Tai-Cheng Lee: A 0.02-mm ² 9-Bit 50-MS/s Cyclic ADC in 90-nm Digital CMOS Technology. J. Solid-State Circuits 45(3): 610-619 (2010)
	2005
1		Tai-Cheng Lee, Yen-Chuan Huang: An optimization technique for RF buffers with active inductors. ISCAS (4) 2005: 3692-3695

Coauthor Index

1 Tai-Cheng Lee [1] [2] [3] [4]

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