 | 2011 |
|---|
| 5 |       | Walter Huang,
David V. Anderson:
Modified Sliding-Block Distributed Arithmetic with Offset Binary Coding for Adaptive Filters.
Signal Processing Systems 63(1): 153-163 (2011) |
| 2009 |
|---|
| 4 | | Walter Huang,
David V. Anderson:
Adaptive filters using modified sliding-block distributed arithmetic with offset binary coding.
ICASSP 2009: 545-548 |
| 2008 |
|---|
| 3 | | Erhan Özalevli,
Walter Huang,
Paul E. Hasler,
David V. Anderson:
A Reconfigurable Mixed-Signal VLSI Implementation of Distributed Arithmetic Used for Finite-Impulse Response Filtering.
IEEE Trans. on Circuits and Systems 55-I(2): 510-521 (2008) |
| 2007 |
|---|
| 2 | | Erhan Ozalevli,
Walter Huang,
Paul E. Hasler,
David V. Anderson:
VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter.
ISCAS 2007: 2168-2171 |
| 2004 |
|---|
| 1 | | Daniel J. Allred,
Walter Huang,
Venkatesh Krishnan,
Heejong Yoo,
David V. Anderson:
An FPGA Implementation for a High Throughput Adaptive Filter Using Distributed Arithmetic.
FCCM 2004: 324-325 |
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