Steve C.-Y. Huang

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1997

4 Steve C.-Y. Huang, Wayne Wolf: Unifiable scheduling and allocation for minimizing system cycle time. IEEE Trans. VLSI Syst. 5(2): 197-210 (1997)

1994

3 Steve C.-Y. Huang, Wayne Wolf: Performance-driven synthesis in controller-datapath systems. IEEE Trans. VLSI Syst. 2(1): 68-80 (1994)

1993

2 Steve C.-Y. Huang, Wayne Wolf: Scheduling a minimum dependence in FSMs. ICCAD 1993: 446-449

1992

1 Steve C.-Y. Huang, Wayne Wolf: Timing-Driven State Assignment for Controller-Datapath Systems. Synthesis for Control Dominated Circuits 1992: 19-31

	1997
4		Steve C.-Y. Huang, Wayne Wolf: Unifiable scheduling and allocation for minimizing system cycle time. IEEE Trans. VLSI Syst. 5(2): 197-210 (1997)
	1994
3		Steve C.-Y. Huang, Wayne Wolf: Performance-driven synthesis in controller-datapath systems. IEEE Trans. VLSI Syst. 2(1): 68-80 (1994)
	1993
2		Steve C.-Y. Huang, Wayne Wolf: Scheduling a minimum dependence in FSMs. ICCAD 1993: 446-449
	1992
1		Steve C.-Y. Huang, Wayne Wolf: Timing-Driven State Assignment for Controller-Datapath Systems. Synthesis for Control Dominated Circuits 1992: 19-31

Coauthor Index

1 Marilyn Wolf (Wayne Wolf, Wayne Hendrix Wolf) [1] [2] [3] [4]

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