Libo Huang

	2012
14		Libo Huang, Zhiying Wang, Nong Xiao: An optimized multicore cache coherence design for exploiting communication locality. ACM Great Lakes Symposium on VLSI 2012: 59-62
13		Libo Huang, Sheng Ma, Li Shen, Zhiying Wang, Nong Xiao: Low-Cost Binary128 Floating-Point FMA Unit Design with SIMD Support. IEEE Trans. Computers 61(5): 745-751 (2012)
	2011
12		Libo Huang, Zhiying Wang, Li Shen, Hongyi Lu, Nong Xiao, Cong Liu: A specialized low-cost vectorized loop buffer for embedded processors. DATE 2011: 1200-1203
	2010
11		Libo Huang, Li Shen, Zhiying Wang, Wei Shi, Nong Xiao, Sheng Ma: SIF: Overcoming the limitations of SIMD devices via implicit permutation. HPCA 2010: 1-12
10		Libo Huang, Zhiying Wang: SV: Enhancing SIMD Architectures via Combined SIMD-Vector Approach. ICA3PP (1) 2010: 226-235
9		Libo Huang, Li Shen, Zhiying Wang: Permutation optimization for SIMD devices. ISCAS 2010: 3849-3852
	2009
8		Sheng Ma, Libo Huang, Zhiying Wang, Kui Dai: Implementation of OpenVG Path and Paint Algorithms on Synchronous Data Triggered Architecture with Optimization. NAS 2009: 379-385
7		Ya-shuai Lü, Li Shen, Libo Huang, Zhiying Wang, Nong Xiao: Optimal subgraph covering for customisable VLIW processors. IET Computers & Digital Techniques 3(1): 14-23 (2009)
	2008
6		Jianjun Guo, Ming-che Lai, Zhengyuan Pang, Libo Huang, Fangyuan Chen, Kui Dai, Zhiying Wang: Memory System Design for a Multi-core Processor. CISIS 2008: 601-606
5		Ya-shuai Lü, Li Shen, Libo Huang, Zhiying Wang, Nong Xiao: Customizing computation accelerators for extensible multi-issue processors with effective optimization techniques. DAC 2008: 197-200
4		Xinbiao Gan, Kui Dai, Libo Huang, Li Shen, Zhiying Wang: A New CORDIC Algorithm and Software Implementation Based on Synchronized Data Triggering Architecture. MUE 2008: 83-86
3		Jianjun Guo, Ming-che Lai, Zhengyuan Pang, Libo Huang, Fangyuan Chen, Kui Dai, Zhiying Wang: Hierarchical memory system design for a heterogeneous multi-core processor. SAC 2008: 1504-1508
	2007
2		Libo Huang, Li Shen, Kui Dai, Zhiying Wang: A New Architecture For Multiple-Precision Floating-Point Multiply-Add Fused Unit Design. IEEE Symposium on Computer Arithmetic 2007: 69-76
1		Libo Huang, Ming-che Lai, Kui Dai, Hong Yue, Li Shen: Hardware Support for Arithmetic Units of Processor with Multimedia Extension. MUE 2007: 633-637

Coauthor Index

1	Fangyuan Chen	[3] [6]
2	Kui Dai	[1] [2] [3] [4] [6] [8]
3	Xinbiao Gan	[4]
4	Jianjun Guo	[3] [6]
5	Ming-che Lai	[1] [3] [6]
6	Cong Liu	[12]
7	Hongyi Lu	[12]
8	Ya-shuai Lü	[5] [7]
9	Sheng Ma	[8] [11] [13]
10	Zhengyuan Pang	[3] [6]
11	Li Shen	[1] [2] [4] [5] [7] [9] [11] [12] [13]
12	Wei Shi	[11]
13	Zhiying Wang	[2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14]
14	Nong Xiao	[5] [7] [11] [12] [13] [14]
15	Hong Yue	[1]

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