 | 1988 |
|---|
| 6 |       | Trieu-Kien Truong,
Irving S. Reed,
In-Shek Hsu,
Hsuen-Chyun Shyu,
Howard M. Shao:
A Pipeline Design of a Fast Prime Factor DFT on a Finite Field.
IEEE Trans. Computers 37(3): 266-273 (1988) |
| 5 | | In-Shek Hsu,
Trieu-Kien Truong,
Leslie J. Deutsch,
Irving S. Reed:
A Comparison of VLSI Architecture of Finite Field Multipliers Using Dual, Normal, or Standard Bases.
IEEE Trans. Computers 37(6): 735-739 (1988) |
| 1986 |
|---|
| 4 | | Trieu-Kien Truong,
J. J. Chang,
In-Shek Hsu,
D. Y. Pei,
Irving S. Reed:
Techniques for Computing the Discrete Fourier Transform Using the Quadratic Residue Fermat Number Systems.
IEEE Trans. Computers 35(11): 1008-1012 (1986) |
| 3 | | Irving S. Reed,
Trieu-Kien Truong,
Jørn M. Jensen,
In-Shek Hsu:
The VLSI Design of an Error-Trellis Syndrome Decoder for Certain Convolutional Codes.
IEEE Trans. Computers 35(9): 781-789 (1986) |
| 1985 |
|---|
| 2 | | Irving S. Reed,
Trieu-Kien Truong,
J. J. Chang,
Howard M. Shao,
In-Shek Hsu:
VLSI residue multiplier modulo a Fermat number.
IEEE Symposium on Computer Arithmetic 1985: 203-206 |
| 1984 |
|---|
| 1 | | In-Shek Hsu,
Irving S. Reed,
Trieu-Kien Truong,
Ke Wang,
Chiunn-Shyong Ye,
Leslie J. Deutsch:
The VLSI Implementation of a Reed-Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm.
IEEE Trans. Computers 33(10): 906-911 (1984) |
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