 | 2010 |
|---|
| 7 |       | Yu-Tsao Hsing,
Li-Ming Denq,
Chao-Hsun Chen,
Cheng-Wen Wu:
Economic Analysis of the HOY Wireless Test Methodology.
IEEE Design & Test of Computers 27(3): 20-30 (2010) |
| 6 | | Chih-Yen Lo,
Yu-Tsao Hsing,
Li-Ming Denq,
Cheng-Wen Wu:
SOC Test Architecture and Method for 3-D ICs.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(10): 1645-1649 (2010) |
| 2009 |
|---|
| 5 | | Te-Hsuan Chen,
Yu-Ying Hsiao,
Yu-Tsao Hsing,
Cheng-Wen Wu:
An Adaptive-Rate Error Correction Scheme for NAND Flash Memory.
VTS 2009: 53-58 |
| 4 | | Li-Ming Denq,
Yu-Tsao Hsing,
Cheng-Wen Wu:
Hybrid BIST Scheme for Multiple Heterogeneous Embedded Memories.
IEEE Design & Test of Computers 26(2): 64-73 (2009) |
| 2007 |
|---|
| 3 | | Yu-Tsao Hsing,
Chun-Chieh Huang,
Jen-Chieh Yeh,
Cheng-Wen Wu:
SDRAM Delay Fault Modeling and Performance Testing.
VTS 2007: 53-58 |
| 2006 |
|---|
| 2 | | Mu-Hsien Hsu,
Yu-Tsao Hsing,
Jen-Chieh Yeh,
Cheng-Wen Wu:
Fault-Pattern Oriented Defect Diagnosis for Flash Memory.
MTDT 2006: 3-8 |
| 2004 |
|---|
| 1 | | Yu-Tsao Hsing,
Chih-Wea Wang,
Ching-Wei Wu,
Chih-Tsun Huang,
Cheng-Wen Wu:
Failure Factor Based Yield Enhancement for SRAM Designs.
DFT 2004: 20-28 |
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