 | 2011 |
| 4 |  | Pingli Huang,
Szukang Hsien,
Victor Lu,
Peiyuan Wan,
Seung-Chul Lee,
Wenbo Liu,
Bo-Wei Chen,
Yung-Pin Lee,
Wen-Tsao Chen,
Tzu-Yi Yang,
Gin-Kou Ma,
Yun Chiu:
SHA-Less Pipelined ADC With In Situ Background Clock-Skew Calibration.
J. Solid-State Circuits 46(8): 1893-1903 (2011) |
| 2010 |
| 3 |  | Pingli Huang,
Szukang Hsien,
Victor Lu,
Peiyuan Wan,
Seung-Chul Lee,
Wenbo Liu,
Bo-Wei Chen,
Yung-Pin Lee,
Wen-Tsao Chen,
Tzu-Yi Yang,
Gin-Kou Ma,
Yun Chiu:
SHA-less pipelined ADC converting 10th Nyquist band with in-situ clock-skew calibration.
CICC 2010: 1-4 |
| 2009 |
| 2 |  | Wenbo Liu,
Yuchun Chang,
Szukang Hsien,
Bo-Wei Chen,
Yung-Pin Lee,
Wen-Tsao Chen,
Tzu-Yi Yang,
Gin-Kou Ma,
Yun Chiu:
A 600MS/s 30mW 0.13µm CMOS ADC array achieving over 60dB SFDR with adaptive digital equalization.
ISSCC 2009: 82-83 |
| 2004 |
| 1 |  | Qun Gu,
Zhiwei Xu,
Jenwei Ko,
Szukang Hsien,
M. Frank Chang:
A self-synchronized RF-interconnect for 3-dimensional integrated circuits.
ISCAS (4) 2004: 317-320 |