 | 2012 |
|---|
| 9 |       | Kuen-Jong Lee,
Tong-Yu Hsieh,
Melvin A. Breuer:
Efficient Overdetection Elimination of Acceptable Faults for Yield Improvement.
IEEE Trans. on CAD of Integrated Circuits and Systems 31(5): 754-764 (2012) |
| 2011 |
|---|
| 8 | | Kuen-Jong Lee,
Wei-Cheng Lien,
Tong-Yu Hsieh:
Test Response Compaction via Output Bit Selection.
IEEE Trans. on CAD of Integrated Circuits and Systems 30(10): 1534-1544 (2011) |
| 7 | | Tong-Yu Hsieh,
Kuen-Jong Lee,
Melvin A. Breuer:
An Error-Tolerance-Based Test Methodology to Support Product Grading for Yield Enhancement.
IEEE Trans. on CAD of Integrated Circuits and Systems 30(6): 930-934 (2011) |
| 2010 |
|---|
| 6 | | Kuen-Jong Lee,
Tong-Yu Hsieh,
Chin-Yao Chang,
Yu-Ting Hong,
Wen-Cheng Huang:
On-Chip SOC Test Platform Design Based on IEEE 1500 Standard.
IEEE Trans. VLSI Syst. 18(7): 1134-1139 (2010) |
| 2009 |
|---|
| 5 | | Tong-Yu Hsieh,
Melvin A. Breuer,
Murali Annavaram,
Sandeep K. Gupta,
Kuen-Jong Lee:
Tolerance of performance degrading faults for effective yield improvement.
ITC 2009: 1-10 |
| 2008 |
|---|
| 4 | | Tong-Yu Hsieh,
Kuen-Jong Lee,
Melvin A. Breuer:
An Error Rate Based Test Methodology to Support Error-Tolerance.
IEEE Transactions on Reliability 57(1): 204-214 (2008) |
| 2007 |
|---|
| 3 | | Tong-Yu Hsieh,
Kuen-Jong Lee,
Melvin A. Breuer:
Reduction of detected acceptable faults for yield improvement via error-tolerance.
DATE 2007: 1599-1604 |
| 2006 |
|---|
| 2 | | Tong-Yu Hsieh,
Kuen-Jong Lee,
Melvin A. Breuer:
An Error-Oriented Test Methodology to Improve Yield with Error-Tolerance.
VTS 2006: 130-135 |
| 2005 |
|---|
| 1 | | Kuen-Jong Lee,
Tong-Yu Hsieh,
Melvin A. Breuer:
A novel test methodology based on error-rate to support error-tolerance.
ITC 2005: 9 |
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