Shen-Fu Hsiao

	2012
22		Shen-Fu Hsiao, Hou-Jen Ko, Chia-Sheng Wen: Two-Level Hardware Function Evaluation Based on Correction of Normalized Piecewise Difference Functions. IEEE Trans. on Circuits and Systems 59-II(5): 292-296 (2012)
	2011
21		Hou-Jen Ko, Shen-Fu Hsiao: Design and Application of Faithfully Rounded and Truncated Multipliers With Combined Deletion, Reduction, Truncation, and Rounding. IEEE Trans. on Circuits and Systems 58-II(5): 304-308 (2011)
	2010
20		Hou-Jen Ko, Shen-Fu Hsiao, Wen-Liang Huang: A new non-uniform segmentation and addressing remapping strategy for hardware-oriented function evaluators based on polynomial approximation. ISCAS 2010: 4153-4156
19		Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen: Low Area/Power Synthesis Using Hybrid Pass Transistor/CMOS Logic Cells in Standard Cell-Based Design Environment. IEEE Trans. on Circuits and Systems 57-II(1): 21-25 (2010)
	2009
18		Liang-Bi Chen, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang: An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. ASP-DAC 2009: 131-132
17		Ming-Chih Chen, Shen-Fu Hsiao: Low Cost Design of an Advanced Encryption Standard (AES) Processor Using a New Common-Subexpression-Elimination Algorithm. IEICE Transactions 92-A(12): 3221-3228 (2009)
	2008
16		Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen: Area oriented pass-transistor logic synthesis using buffer elimination and layout compaction. ISCAS 2008: 2022-2025
15		Shen-Fu Hsiao, Ping-Chung Wei, Ching-Pin Lin: An automatic hardware generator for special arithmetic functions using various ROM-based approximation approaches. ISCAS 2008: 468-471
	2006
14		Shen-Fu Hsiao, Sze-Yun Lin, Tze-Chong Cheng, Ming-Yu Tsai: An Automatic Cache Generator Based on Content-Addressable Memory. APCCAS 2006: 1313-1316
13		Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen: Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits. APCCAS 2006: 1631-1634
12		Shen-Fu Hsiao, Yo-Chi Chen, Ming-Yu Tsai, Tze-Chong Cheng: Novel Memory Organization and Circuit Designs for Efficient Data Access in Applications of 3D Graphics and Multimedia Coding. MTDT 2006: 34-42
	2005
11		Shen-Fu Hsiao, Ming-Yu Tsai, Ming-Chih Chen, Chia-Sheng Wen: An efficient pass-transistor-logic synthesizer using multiplexers and inverters only. ISCAS (3) 2005: 2433-2436
10		Tso-Bing Juang, Shen-Fu Hsiao, Ming-Yu Tsai, Jenq-Shiun Jan: A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition. IEICE Transactions 88-D(7): 1464-1471 (2005)
	2002
9		Tso-Bing Juang, Jeng-Hsiun Jan, Ming-Yu Tsai, Shen-Fu Hsiao: Partition methodology for the final adder in a tree-structure parallel multiplier generator. APCCAS (1) 2002: 471-474
	2001
8		Shen-Fu Hsiao, Wei-Ren Shiue: A new hardware-efficient algorithm and architecture for computation of 2-D DCTs on a linear array. IEEE Trans. Circuits Syst. Video Techn. 11(11): 1149-1159 (2001)
7		Shen-Fu Hsiao, Jian-Ming Tseng: Parallel, Pipelined and Folded Architectures for Computation of 1-D and 2-D DCT in Image and Video Codec. VLSI Signal Processing 28(3): 205-220 (2001)
	2000
6		Shen-Fu Hsiao, Chun-Yi Lau, Jean-Marc Delosme: Redundant Constant-Factor Implementation of Multi-Dimensional CORDIC and Its Application to Complex SVD. VLSI Signal Processing 25(2): 155-166 (2000)
	1999
5		Shen-Fu Hsiao: A high-speed constant-factor redundant CORDIC processor without extra correcting or scaling iterations. ISCAS (1) 1999: 455-458
	1998
4		Shen-Fu Hsiao, Jen-Yin Chen: Design, Implementation and Analysis of a New Redundant CORDIC Processor with Constant Scaling Factor and Regular Structure. VLSI Signal Processing 20(3): 267-278 (1998)
	1996
3		Shen-Fu Hsiao, Jean-Marc Delosme: Parallel singular value decomposition of complex matrices using multidimensional CORDIC algorithms. IEEE Transactions on Signal Processing 44(3): 685-697 (1996)
	1995
2		Shen-Fu Hsiao, Jean-Marc Delosme: Householder CORDIC Algorithms. IEEE Trans. Computers 44(8): 990-1001 (1995)
	1991
1		Shen-Fu Hsiao, Jean-Marc Delosme: The CORDIC Householder algorithm. IEEE Symposium on Computer Arithmetic 1991: 256-263

Coauthor Index

1	Yun-Nan Chang	[18]
2	Jen-Yin Chen	[4]
3	Liang-Bi Chen	[18]
4	Ming-Chih Chen	[11] [17]
5	Yo-Chi Chen	[12]
6	Tze-Chong Cheng	[12] [14]
7	Jean-Marc Delosme	[1] [2] [3] [6]
8	Ruei-Ting Gu	[18]
9	Tsung-Yu Ho	[18]
10	Ing-Jer Huang	[18]
11	Wei-Sheng Huang	[18]
12	Wen-Liang Huang	[20]
13	Jeng-Hsiun Jan	[9]
14	Jenq-Shiun Jan	[10]
15	Tso-Bing Juang	[9] [10]
16	Hou-Jen Ko	[20] [21] [22]
17	Chun-Yi Lau	[6]
18	Chung-Nan Lee	[18]
19	Ching-Pin Lin	[15]
20	Sze-Yun Lin	[14]
21	Wei-Ren Shiue	[8]
22	Wen-Chi Shiue	[18]
23	Ming-Yu Tsai	[9] [10] [11] [12] [13] [14] [16] [19]
24	Jian-Ming Tseng	[7]
25	Chien-Chou Wang	[18]
26	Ping-Chung Wei	[15]
27	Chia-Sheng Wen	[11] [13] [16] [19] [22]

Colors in the list of coauthors

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