| | |
- CSB - MetaPress - Google - Bing - Yahoo
 | 2007 | |
|---|---|---|
| 4 |      | Kohei Hosokawa, Katsunori Tanaka, Yuichi Nakamura: Efficient Memory Utilization for High-Speed FPGA-Based Hardware Emulators with SDRAMs. IEICE Transactions 90-A(12): 2810-2817 (2007) |
| 2006 | ||
| 3 | | Yuichi Nakamura, Kohei Hosokawa: Fast FPGA-Emulation-Based Simulation Environment for Custom Processors. IEICE Transactions 89-A(12): 3464-3470 (2006) |
| 2005 | ||
| 2 | | Kohei Hosokawa, Mitsuhiko Yagyu, Akinori Nishihara: Design Method for 2-Channel Signal Word Decomposed Filters with Minimum Output Error and Their Effective VLSI Implementation. IEICE Transactions 88-A(8): 2044-2054 (2005) |
| 2004 | ||
| 1 | | Yuichi Nakamura, Kohei Hosokawa, Ichiro Kuroda, Ko Yoshikawa, Takeshi Yoshimura: A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication. DAC 2004: 299-304 |
| 1 | Ichiro Kuroda | [1] |
| 2 | Yuichi Nakamura (Yuhichi Nakamura) | [1] [3] [4] |
| 3 | Akinori Nishihara | [2] |
| 4 | Katsunori Tanaka | [4] |
| 5 | Mitsuhiko Yagyu | [2] |
| 6 | Ko Yoshikawa | [1] |
| 7 | Takeshi Yoshimura | [1] |
Colors in the list of coauthors
Last update Sat Jun 2 20:57:36 2012 CET by the DBLP Team —
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