 | 2012 |
| 5 |  | Praveen Salihundam,
Mohammed Asadullah Khan,
Shailendra Jain,
Yatin Hoskote,
Satish Yada,
Shasi Kumar,
Vasantha Erraguntla,
Sriram R. Vangal,
Nitin Borkar:
A Reconfigurable On-die Traffic Generator in 45nm CMOS for a 48 iA-32 Core Network-on-Chip.
VLSI Design 2012: 292-297 |
| 2011 |
| 4 |  | Praveen Salihundam,
Shailendra Jain,
Tiju Jacob,
Shasi Kumar,
Vasantha Erraguntla,
Yatin Hoskote,
Sriram R. Vangal,
Gregory Ruhl,
Nitin Borkar:
A 2 Tb/s 6 , ˟, 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS.
J. Solid-State Circuits 46(4): 757-766 (2011) |
| 2010 |
| 3 |  | Jason Howard,
Saurabh Dighe,
Yatin Hoskote,
Sriram R. Vangal,
David Finan,
Gregory Ruhl,
David Jenkins,
Howard Wilson,
Nitin Borkar,
Gerhard Schrom,
Fabric Pailet,
Shailendra Jain,
Tiju Jacob,
Satish Yada,
Sraven Marella,
Praveen Salihundam,
Vasantha Erraguntla,
Michael Konow,
Michael Riepen,
Guido Droege,
Joerg Lindemann,
Matthias Gries,
Thomas Apel,
Kersten Henriss,
Tor Lund-Larsen,
Sebastian Steibl,
Shekhar Borkar,
Vivek De,
Rob F. Van der Wijngaart,
Timothy G. Mattson:
A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS.
ISSCC 2010: 108-109 |
| 2 |  | Shailendra Jain,
Vasantha Erraguntla,
Sriram R. Vangal,
Yatin Hoskote,
Nitin Borkar,
Tulasi Mandepudi,
V. P. Karthik:
A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm.
VLSI Design 2010: 252-257 |
| 2007 |
| 1 |  | Yatin Hoskote,
Sriram R. Vangal,
Arvind Singh,
Nitin Borkar,
Shekhar Borkar:
A 5-GHz Mesh Interconnect for a Teraflops Processor.
IEEE Micro 27(5): 51-61 (2007) |