Chia-Lung Horng

	2010
2		Mao-Yin Wang, Chih-Pin Su, Chia-Lung Horng, Cheng-Wen Wu, Chih-Tsun Huang: Single- and Multi-core Configurable AES Architectures for Flexible Security. IEEE Trans. VLSI Syst. 18(4): 541-552 (2010)
	2005
1		Chih-Pin Su, Chia-Lung Horng, Chih-Tsun Huang, Cheng-Wen Wu: A configurable AES processor for enhanced security. ASP-DAC 2005: 361-366

Coauthor Index

1	Chih-Tsun Huang	[1] [2]
2	Chih-Pin Su	[1] [2]
3	Mao-Yin Wang	[2]
4	Cheng-Wen Wu	[1] [2]

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