 | 2011 |
|---|
| 4 |       | Kuo-Hsing Cheng,
Kai-Wei Hong,
Chi-Hsiang Chen,
Jen-Chieh Liu:
A High Precision Fast Locking Arbitrary Duty Cycle Clock Synchronization Circuit.
IEEE Trans. VLSI Syst. 19(7): 1218-1228 (2011) |
| 3 | | Kuo-Hsing Cheng,
Jen-Chieh Liu,
Chih-Yu Chang,
Shu-Yu Jiang,
Kai-Wei Hong:
Built-in Jitter Measurement Circuit With Calibration Techniques for a 3-GHz Clock Generator.
IEEE Trans. VLSI Syst. 19(8): 1325-1335 (2011) |
| 2009 |
|---|
| 2 | | Kuo-Hsing Cheng,
Yu-Chang Tsai,
Chien-Nan Jimmy Liu,
Kai-Wei Hong,
Chin-Cheng Kuo:
A Low Jitter Self-Calibration PLL for 10-Gbps SoC Transmission Links Application.
IEICE Transactions 92-C(7): 964-972 (2009) |
| 1 | | Chia-Chun Tsai,
Kai-Wei Hong,
Trong-Yen Lee:
A Bisection-Based Power Reduction Design for CMOS Flash Analog-to-Digital converters.
Journal of Circuits, Systems, and Computers 18(5): 933-945 (2009) |
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