Yuya Homma

	2005
2		Yuya Homma, Michitaka Kameyama, Yoshichika Fujioka, Nobuhiro Tomabechi: VLSI architecture based on packet data transfer scheme and its application. ISCAS (2) 2005: 1786-1789
1		Tomoaki Hasegawa, Yuya Homma, Michitaka Kameyama: Multiple-Valued VLSI Architecture for Intra-Chip Packet Data Transfer. ISMVL 2005: 114-119

Coauthor Index

1	Yoshichika Fujioka	[2]
2	Tomoaki Hasegawa	[1]
3	Michitaka Kameyama	[1] [2]
4	Nobuhiro Tomabechi	[2]

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