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| 1992 | ||
|---|---|---|
| 2 | Ronn B. Brashear, Douglas R. Holberg, M. Ray Mercer, Lawrence T. Pillage: ETA: electrical-level timing analysis. ICCAD 1992: 258-262 | |
| 1990 | ||
| 1 | Douglas R. Holberg, Santanu Dutta, Lawrence T. Pillage: DC Parameterized Piecewise-Function Transistor Models for Bipolar and MOS Logic Stage Delay Evaluation. ICCAD 1990: 546-549 | |
| 1 | Ronn B. Brashear | [2] |
| 2 | Santanu Dutta | [1] |
| 3 | M. Ray Mercer | [2] |
| 4 | Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage) | [1] [2] |
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