Hiroomi Hikawa

	2011
33		Yutaka Maeda, Takahiro Yamada, Seiji Miyoshi, Hiroomi Hikawa: Learning Scheme for Complex Neural Networks Using Simultaneous Perturbation. ICANN (2) 2011: 462-469
32		Hiroomi Hikawa, Yusuke Araga: Study on gesture recognition system using posture classifier and Jordan recurrent neural network. IJCNN 2011: 405-412
31		Hiroomi Hikawa, Keishi Kaida: Hand sign recognition system based on SOM-Hebb hybrid network. SMC 2011: 265-270
30		Hiroomi Hikawa: ROM-Less Phase to Amplitude Converter Using Sine Wave Approximation Based on Harmonic Removal from Trapezoid Wave. IEICE Transactions 94-A(7): 1581-1584 (2011)
	2010
29		Hiroomi Hikawa, Seito Yamazaki, Tatsuya Ando, Simone Miyoshi, Yutaka Maeda: Comparison of range check classifier and hybrid network classifier for hand sign recognition system. IJCNN 2010: 1-8
28		Hiroomi Hikawa, Kenji Doumoto, Simone Miyoshi, Yutaka Maeda: Image compression with hardware self-organizing map. IJCNN 2010: 1-8
27		Hiroomi Hikawa, Taketo Namba: Phase amplitude converter with conditional shift operation. ISCAS 2010: 3008-3011
	2009
26		Yutaka Maeda, Naoto Matsushita, Seiji Miyoshi, Hiroomi Hikawa: On simultaneous perturbation particle swarm optimization. IEEE Congress on Evolutionary Computation 2009: 3271-3276
25		Akira Onoo, Hiroomi Hikawa, Seiji Miyoshi, Yutaka Maeda: On automatic generation of VHDL code for self-organizing map. IJCNN 2009: 2366-2373
24		Yuuki Taki, Hiroomi Hikawa, Seiji Miyoshi, Yutaka Maeda: Hand sign recognition system based on hybrid network classifier. IJCNN 2009: 3074-3081
23		Hiroomi Hikawa: DDFS with New Sinusoid Approximation based on Harmonics Removal. ISCAS 2009: 1751-1754
22		Seiji Miyoshi, Hiroomi Hikawa, Yutaka Maeda: Statistical Mechanical Analysis of Simultaneous Perturbation Learning. IEICE Transactions 92-A(7): 1743-1746 (2009)
	2008
21		Hiroomi Hikawa, Hirotada Fujimura: Hardware Design of Japanese Hand Sign Recognition System. ICONIP (2) 2008: 835-842
	2007
20		Hirotada Fujimura, Yuuichi Sakai, Hiroomi Hikawa: Japanese Hand Sign Recognition System. ICONIP (1) 2007: 983-992
19		Hiroomi Hikawa, Kaori Kugimiya: A New Hardware Friendly Vector Distance Evaluation Function for Vector Classifiers. ICONIP (2) 2007: 137-146
18		Hiroomi Hikawa, Shigeki Matsubara: Pseudo RBF Network for Position Independent Hand Posture Recognition System. IJCNN 2007: 1049-1054
17		Hiroomi Hikawa, Taku Miyanishi, Kousuke Tamaya: Performance Comparison of SOM Based Hybrid Hardware Classifiers. IJCNN 2007: 1091-1096
16		Hiroomi Hikawa, Kazutoshi Harada, Takenori Hirabayashi: Hardware Feedback Self-Organizing Map and its Application to Mobile Robot Location Identification. JACIII 11(8): 937-945 (2007)
	2006
15		Hiroomi Hikawa: Vector Quantization System Based on Scalar SOM/AND-OR Hybrid Network. IJCNN 2006: 1489-1496
	2005
14		Shigeki Matsubara, Hiroomi Hikawa: Hardware friendly vector quantization algorithm. ISCAS (4) 2005: 3623-3626
13		Hiroomi Hikawa: FPGA implementation of self organizing map with digital phase locked loops. Neural Networks 18(5-6): 514-522 (2005)
	2004
12		Hiroomi Hikawa: Direct digital frequency synthesizer with multi-stage linear interpolation. ISCAS (4) 2004: 233-236
	2003
11		Hiroomi Hikawa: Pulse mode neuron with leakage integrator and additive random noise. ISCAS (5) 2003: 821-824
10		Hiroomi Hikawa: A new digital pulse-mode neuron with adjustable activation function. IEEE Transactions on Neural Networks 14(1): 236-242 (2003)
9		Hiroomi Hikawa: A digital hardware pulse-mode neuron with piecewise linear activation function. IEEE Transactions on Neural Networks 14(5): 1028-1037 (2003)
8		Hiroomi Hikawa: A multilayer neural network with pulse position modulation. Systems and Computers in Japan 34(13): 36-46 (2003)
	2001
7		Hiroomi Hikawa: Digital pulse mode neural network with simple synapse multiplier. ISCAS (3) 2001: 569-572
	2000
6		Hiroomi Hikawa: Pulse Mode Multilayer Neural Network with Floating Point Operation and On-Chip Learning. IJCNN (2) 2000: 71-80
5		Hiroomi Hikawa: An efficient three-valued multilayer neural network with on-chip learning suitable for hardware implementation. Systems and Computers in Japan 31(4): 43-51 (2000)
	1999
4		Hiroomi Hikawa: An efficient pulse mode multilayer neural network. ISCAS (5) 1999: 367-370
	1994
3		Vijay K. Jain, Hiroomi Hikawa: Parallel Architecture for Universal Digital Signal Processing. HICSS (1) 1994: 114-123
	1992
2		Vijay K. Jain, Hiroomi Hikawa, David C. Keezer: An Architecture for WSI Rapid Prototyping. IEEE Computer 25(4): 71-75 (1992)
1		Earl E. Swartzlander Jr., Vijay K. Jain, Hiroomi Hikawa: A radix-8 wafer scale FFT processor. VLSI Signal Processing 4(2-3): 165-176 (1992)

Coauthor Index

1	Tatsuya Ando	[29]
2	Yusuke Araga	[32]
3	Kenji Doumoto	[28]
4	Hirotada Fujimura	[20] [21]
5	Kazutoshi Harada	[16]
6	Takenori Hirabayashi	[16]
7	Vijay K. Jain	[1] [2] [3]
8	Keishi Kaida	[31]
9	David C. Keezer	[2]
10	Kaori Kugimiya	[19]
11	Yutaka Maeda	[22] [24] [25] [26] [28] [29] [33]
12	Shigeki Matsubara	[14] [18]
13	Naoto Matsushita	[26]
14	Taku Miyanishi	[17]
15	Seiji Miyoshi	[22] [24] [25] [26] [33]
16	Simone Miyoshi	[28] [29]
17	Taketo Namba	[27]
18	Akira Onoo	[25]
19	Yuuichi Sakai	[20]
20	Earl E. Swartzlander Jr.	[1]
21	Yuuki Taki	[24]
22	Kousuke Tamaya	[17]
23	Takahiro Yamada	[33]
24	Seito Yamazaki	[29]

Colors in the list of coauthors

Last update Thu May 31 18:55:10 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page