José Ignacio Hidalgo

	2012
61		Iván Contreras, José Ignacio Hidalgo, Laura Núñez-Letamendia: A GA Combining Technical and Fundamental Analysis for Trading the Stock Market. EvoApplications 2012: 174-183
60		David Millán-Ruiz, José Ignacio Hidalgo: Migration and Replacement Policies for Preserving Diversity in Dynamic Environments. EvoApplications 2012: 456-465
59		Iván Contreras, Yiyi Jiang, José Ignacio Hidalgo, Laura Núñez-Letamendia: Using a GPU-CPU architecture to speed up a GA-based real-time system for trading the stock market. Soft Comput. 16(2): 203-215 (2012)
	2011
58		David Cuesta Gómez, José Luis Risco-Martín, José Luis Ayala, José Ignacio Hidalgo: A combination of evolutionary algorithm and mathematical programming for the 3d thermal-aware floorplanning problem. GECCO 2011: 1731-1738
57		J. Manuel Colmenar, José L. Risco-Martín, David Atienza, José Ignacio Hidalgo: Multi-objective optimization of dynamic memory managers using grammatical evolution. GECCO 2011: 1819-1826
56		Alfredo Cuesta-Infante, José Ignacio Hidalgo, María Victoria Rivas: (1+2)-evolution strategy for fitting a straight shuffle of min to a dataset. GECCO (Companion) 2011: 115-116
55		Ignacio Arnaldo, José L. Risco-Martín, José L. Ayala, José Ignacio Hidalgo: Power Profiling-Guided Floorplanner for Thermal Optimization in 3D Multiprocessor Architectures. PATMOS 2011: 11-21
54		Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo: A phase adaptive cache hierarchy for SMT processors. Microprocessors and Microsystems - Embedded Hardware Design 35(8): 683-694 (2011)
53		José L. Risco-Martín, J. Manuel Colmenar, David Atienza, José Ignacio Hidalgo: Simulation of high-performance memory allocators. Microprocessors and Microsystems - Embedded Hardware Design 35(8): 755-765 (2011)
	2010
52		David Cuesta, José Luis Ayala, José Ignacio Hidalgo, Massimo Poncino, Andrea Acquaviva, Enrico Macii: Thermal-aware floorplanning exploration for 3D multi-core architectures. ACM Great Lakes Symposium on VLSI 2010: 99-102
51		José Luis Risco-Martín, José Manuel Colmenar, David Atienza, José Ignacio Hidalgo: Simulation of High-Performance Memory Allocators. DSD 2010: 275-282
50		Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo: Adaptive Cache Memories for SMT Processors. DSD 2010: 331-338
49		David Millán-Ruiz, José Ignacio Hidalgo: A Memetic Algorithm for Workforce Distribution in Dynamic Multi-Skill Call Centres. EvoCOP 2010: 178-189
48		José Manuel Colmenar, José L. Risco-Martín, David Atienza, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares: Improving reliability of embedded systems through dynamic memory manager optimization using grammatical evolution. GECCO 2010: 1227-1234
47		David Millán-Ruiz, Jorge Pacheco, José Ignacio Hidalgo, José L. Vélez: Forecasting in a Multi-skill Call Centre. ICAISC (2) 2010: 582-589
46		Alfredo Cuesta-Infante, Roberto Santana, José Ignacio Hidalgo, Concha Bielza, Pedro Larrañaga: Bivariate empirical and n-variate Archimedean copulas in estimation of distribution algorithms. IEEE Congress on Evolutionary Computation 2010: 1-8
45		Josefa Díaz, Francisco Fernández de Vega, José Ignacio Hidalgo, Oscar Garnica: Parisian Approach - Reducing Computational Effort to Improve SMT Performance by setting Resizable Caches. IJCCI (ICEC) 2010: 275-280
44		David Millán-Ruiz, José Ignacio Hidalgo, Josefa Díaz: Comparison of Metaheuristics for Workforce Distribution in Multi-skill Call Centres. IJCCI (ICEC) 2010: 352-357
43		David Cuesta, José L. Ayala, José Ignacio Hidalgo, David Atienza, Andrea Acquaviva, Enrico Macii: Adaptive Task Migration Policies for Thermal Control in MPSoCs. ISVLSI 2010: 110-115
42		J. Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo: Simulating a LAGS processor to consider variable latency on L1 D-Cache. SummerSim 2010: 56-63
41		José L. Risco-Martín, David Atienza, José Ignacio Hidalgo, Juan Lanchares: Parallel and Distributed Optimization of Dynamic Data Structures for Multimedia Embedded Systems. Parallel and Distributed Computational Intelligence 2010: 263-290
40		Nuria Joglar, Diego Martín, J. Manuel Colmenar, Ivan Martinez, José Ignacio Hidalgo: iTest: online assessment and self-assessment in mathematics. Interact. Techn. Smart Edu. 7(3): 154-167 (2010)
39		José Ignacio Hidalgo, Francisco Fernández, Juan Lanchares, Erick Cantú-Paz, Albert Y. Zomaya: Parallel Architectures and Bioinspired Algorithms. Parallel Computing 36(10-11): 553-554 (2010)
	2009
38		José Luis Risco-Martín, José Ignacio Hidalgo, David Atienza, Juan Lanchares, Oscar Garnica: Mixed heuristic and mathematical programming using reference points for dynamic data types optimization in multimedia embedded systems. GECCO 2009: 1601-1608
37		José L. Risco-Martín, David Atienza, Rubén Gonzalo, José Ignacio Hidalgo: Optimization of dynamic memory managers for embedded systems using grammatical evolution. GECCO 2009: 1609-1616
36		Diego J. Bodas-Sagi, Pablo Fernández, José Ignacio Hidalgo, Francisco J. Soltero, José Luis Risco-Martín: Multiobjective optimization of technical market indicators. GECCO (Companion) 2009: 1999-2004
35		Josefa Díaz, José Ignacio Hidalgo, Francisco Fernández, Oscar Garnica, Sonia López: Improving SMT performance: an application of genetic algorithms to configure resizable caches. GECCO (Companion) 2009: 2029-2034
34		Christos Baloukas, José Luis Risco-Martín, David Atienza, Christophe Poucet, Lazaros Papadopoulos, Stylianos Mamagkakis, Dimitrios Soudris, José Ignacio Hidalgo, Francky Catthoor, Juan Lanchares: Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems. Journal of Systems and Software 82(4): 590-602 (2009)
33		José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo: Characterizing asynchronous variable latencies through probability distribution functions. Microprocessors and Microsystems - Embedded Hardware Design 33(7-8): 483-497 (2009)
	2008
32		José Luis Risco-Martín, David Atienza, José Ignacio Hidalgo, Juan Lanchares: Design Flow of Dynamically-Allocated Data Types in Embedded Applications Based on Elitist Evolutionary Computation Optimization. DSD 2008: 455-463
31		José L. Risco-Martín, José Ignacio Hidalgo, Juan Lanchares, Oscar Garnica: Solving discrete deceptive problems with EMMRS. GECCO 2008: 1139-1140
30		José Ignacio Hidalgo, José L. Risco-Martín, David Atienza, Juan Lanchares: Analysis of multi-objective evolutionary algorithms to optimize dynamic data types in embedded systems. GECCO 2008: 1515-1522
29		Pablo Fernández-Blanco, Diego J. Bodas-Sagi, Francisco J. Soltero, José Ignacio Hidalgo: Technical market indicators optimization using evolutionary algorithms. GECCO (Companion) 2008: 1851-1858
28		José Manuel Colmenar, Noelia Morón, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo: Modelling Asynchronous Systems using Probability Distribution Functions. PDP 2008: 3-11
27		José L. Risco-Martín, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, David Atienza: Particle swarm optimisation of memory usage in embedded systems. IJHPSA 1(4): 209-219 (2008)
26		José L. Risco-Martín, David Atienza, José Ignacio Hidalgo, Juan Lanchares: A parallel evolutionary algorithm to optimize dynamic data types in embedded systems. Soft Comput. 12(12): 1157-1167 (2008)
	2007
25		José Ignacio Hidalgo, Francisco Fernández de Vega, Juan Lanchares, Daniel Lombraña Gonzalez: Is the island model fault tolerant? GECCO 2007: 1519
24		José Ignacio Hidalgo, Juan Lanchares, Francisco Fernández de Vega, Daniel Lombraña Gonzalez: Is the island model fault tolerant? GECCO (Companion) 2007: 2737-2744
23		David Atienza, Christos Baloukas, Lazaros Papadopoulos, Christophe Poucet, Stylianos Mamagkakis, José Ignacio Hidalgo, Francky Catthoor, Dimitrios Soudris, Juan Lanchares: Optimization of dynamic data structures in multimedia embedded systems using evolutionary computation. SCOPES 2007: 31-40
22		Guadalupe Miñana, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar, Oscar Garnica, Sonia López: Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders. IET Computers & Digital Techniques 1(2): 113-119 (2007)
	2006
21		José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, Guadalupe Miñana, Sonia López: Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart. DSD 2006: 423-432
20		Guadalupe Miñana, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar: A Power-Aware Technique for Functional Units in High-Performance Processors. DSD 2006: 456-459
19		José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, Guadalupe Miñana, Sonia López: Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions. Euro-Par 2006: 495-505
18		Guadalupe Miñana, José Ignacio Hidalgo, Oscar Garnica, Juan Lanchares, José Manuel Colmenar, Sonia López: A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors. PATMOS 2006: 514-523
	2005
17		José Ignacio Hidalgo, Francisco Fernández: Balancing the computation effort in genetic algorithms. Congress on Evolutionary Computation 2005: 1645-1652
16		Guadalupe Miñana, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar: Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width. PATMOS 2005: 40-48
	2004
15		José Manuel Colmenar, Oscar Garnica, Sonia López, José Ignacio Hidalgo, Juan Lanchares, Román Hermida: Empirical Characterization of the Latency of Long Asynchronous Pipelines with Data-Dependent Module Delays. PDP 2004: 112-119
14		Francisco Fernández, José Ignacio Hidalgo, Juan Lanchares, J. M. Sánchez: A methodology for reconfigurable hardware design based upon evolutionary computation. Microprocessors and Microsystems 28(7): 363-371 (2004)
	2003
13		José Ignacio Hidalgo, Francisco Fernández de Vega, Juan Lanchares, Juan Manuel Sánchez-Pérez, Román Hermida, Marco Tomassini, Ranieri Baraglia, Raffaele Perego, Oscar Garnica: Multi-FPGA Systems Synthesis by Means of Evolutionary Computation. GECCO 2003: 2109-2120
12		Sonia López, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, Román Hermida: Power-Consumption RRRRreduction in Asynchronous Circuits Using Delay Path Unequalization. PATMOS 2003: 151-160
11		José Ignacio Hidalgo, Manuel Prieto, Juan Lanchares, Ranieri Baraglia, Francisco Tirado, Oscar Garnica: Hybrid Parallelization of a Compact Genetic Algorithm. PDP 2003: 449-455
	2002
10		Aitor Ibarra, José M. Mendías, Juan Lanchares, José Ignacio Hidalgo, Román Hermida: Optimization of Equational Specifications Using Genetic Techniques. DSD 2002: 252-258
9		José Ignacio Hidalgo, Juan Lanchares, Aitor Ibarra, Román Hermida: A Hybrid Evolutionary Algorithm for Multi-FPGA Systems Design. DSD 2002: 60-69
8		Aitor Ibarra, Juan Lanchares, Jose Manuel Mendias, José Ignacio Hidalgo, Román Hermida: Transformation of Equational Specification by Means of Genetic Programming. EuroGP 2002: 248-257
	2001
7		Aitor Ibarra, Juan Lanchares, José Ignacio Hidalgo, F. Saenz: Pipelined Genetic Architecture with Fitness on the Fly. DSD 2001: 382-385
6		Ranieri Baraglia, José Ignacio Hidalgo, Raffaele Perego: A Parallel Hybrid Heuristic for the TSP. EvoWorkshops 2001: 193-202
5		Ranieri Baraglia, Raffaele Perego, José Ignacio Hidalgo, Juan Lanchares, Francisco Tirado: A Parallel Compact Genetic Algorithm for Multi-FPGA Partitioning. PDP 2001: 113-120
4		Ranieri Baraglia, José Ignacio Hidalgo, Raffaele Perego: A hybrid heuristic for the traveling salesman problem. IEEE Trans. Evolutionary Computation 5(6): 613-622 (2001)
	2000
3		José Ignacio Hidalgo, Juan Lanchares, Román Hermida: Partitioning and Placement for Multi-FPGA Systems Using Genetic Algorithms. EUROMICRO 2000: 1204-1211
	1999
2		José Ignacio Hidalgo, Manuel Prieto, Juan Lanchares, Francisco Tirado, B. de Andrés, S. Esteban, D. Rivera: A Method for Model Parameter Identification Using Parallel Genetic Algorithms. PVM/MPI 1999: 291-298
	1997
1		José Ignacio Hidalgo, Juan Lanchares: Functional Partitioning for Hardware-Software Codesign using Genetic Algorithms. EUROMICRO 1997: 631-638

Coauthor Index

1	Andrea Acquaviva	[43] [52]
2	David H. Albonesi	[50] [54]
3	B. de Andrés	[2]
4	Ignacio Arnaldo	[55]
5	David Atienza (David Atienza Alonso)	[23] [26] [27] [30] [32] [34] [37] [38] [41] [43] [48] [51] [53] [57]
6	José Luis Ayala (José L. Ayala)	[43] [52] [55] [58]
7	Christos Baloukas	[23] [34]
8	Ranieri Baraglia	[4] [5] [6] [11] [13]
9	Concha Bielza	[46]
10	Diego J. Bodas-Sagi	[29] [36]
11	Erick Cantú-Paz	[39]
12	Francky Catthoor	[23] [34]
13	J. Manuel Colmenar	[40] [42] [53] [57]
14	José Manuel Colmenar	[15] [16] [18] [19] [20] [21] [22] [28] [33] [48] [51]
15	Iván Contreras	[59] [61]
16	David Cuesta (David Cuesta Gómez)	[43] [52] [58]
17	Alfredo Cuesta-Infante	[46] [56]
18	Josefa Díaz	[35] [44] [45]
19	Steven G. Dropsho (Steve Dropsho)	[50] [54]
20	S. Esteban	[2]
21	Francisco Fernández	[14] [17] [35] [39]
22	Pablo Fernández	[36]
23	Pablo Fernández-Blanco	[29]
24	Oscar Garnica	[11] [12] [13] [15] [16] [18] [19] [20] [21] [22] [27] [28] [31] [33] [35] [38] [42] [45] [48] [50] [54]
25	Daniel Lombraña Gonzalez	[24] [25]
26	Rubén Gonzalo	[37]
27	Román Hermida	[3] [8] [9] [10] [12] [13] [15]
28	Aitor Ibarra	[7] [8] [9] [10]
29	Yiyi Jiang	[59]
30	Nuria Joglar	[40]
31	Juan Lanchares	[1] [2] [3] [5] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [30] [31] [32] [33] [34] [38] [39] [41] [42] [48] [50] [54]
32	Pedro Larrañaga	[46]
33	Sonia López	[12] [15] [18] [19] [21] [22] [35] [50] [54]
34	Enrico Macii	[43] [52]
35	Stylianos Mamagkakis (Stelios Mamagkakis)	[23] [34]
36	Diego Martín	[40]
37	Ivan Martinez	[40]
38	Jose Manuel Mendias (José M. Mendías)	[8] [10]
39	David Millán-Ruiz	[44] [47] [49] [60]
40	Guadalupe Miñana	[16] [18] [19] [20] [21] [22]
41	Noelia Morón	[28]
42	Laura Núñez-Letamendia (Laura Núñez)	[59] [61]
43	Jorge Pacheco	[47]
44	Lazaros Papadopoulos	[23] [34]
45	Raffaele Perego	[4] [5] [6] [13]
46	Massimo Poncino	[52]
47	Christophe Poucet	[23] [34]
48	Manuel Prieto (Manuel Prieto-Matías)	[2] [11]
49	José Luis Risco-Martín (José L. Risco-Martín)	[26] [27] [30] [31] [32] [34] [36] [37] [38] [41] [48] [51] [53] [55] [57] [58]
50	María Victoria Rivas	[56]
51	D. Rivera	[2]
52	F. Saenz	[7]
53	J. M. Sánchez	[14]
54	Juan Manuel Sánchez-Pérez	[13]
55	Roberto Santana	[46]
56	Francisco J. Soltero	[29] [36]
57	Dimitrios Soudris (D. J. Soudris)	[23] [34]
58	Francisco Tirado	[2] [5] [11]
59	Marco Tomassini	[13]
60	Francisco Fernández de Vega	[13] [24] [25] [45]
61	José L. Vélez	[47]
62	Albert Y. Zomaya	[39]

Colors in the list of coauthors

Last update Thu May 31 18:55:10 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page