 | 2010 |
| 6 |  | Sahar Foroutan,
Yvain Thonnart,
Richard Hersemeule,
Ahmed Jerraya:
An analytical method for evaluating Network-on-Chip performance.
DATE 2010: 1629-1632 |
| 5 |  | Sahar Foroutan,
Yvain Thonnart,
Richard Hersemeule,
Ahmed Jerraya:
A Markov chain based method for NoC end-to-end latency evaluation.
IPDPS Workshops 2010: 1-8 |
| 2008 |
| 4 |  | Nicolas Coste,
Hubert Garavel,
Holger Hermanns,
Richard Hersemeule,
Yvain Thonnart,
Meriem Zidouni:
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures.
DATE 2008: 88-89 |
| 2003 |
| 3 |  | Pierre Wodey,
Geoffrey Camarroque,
Fabrice Baray,
Richard Hersemeule,
Jean-Philippe Cousin:
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect.
MEMOCODE 2003: 204- |
| 1999 |
| 2 |  | François Pogodalla,
Richard Hersemeule,
Pierre Coulomb:
Fast prototyping: a system design flow for fast design, prototyping and efficient IP reuse.
CODES 1999: 69-73 |
| 1 |  | Benoit Clement,
Richard Hersemeule,
Etienne Lantreibecq,
Bernard Ramanadin,
Pierre Coulomb,
François Pogodalla:
Fast Prototyping: A System Design Flow Applied to a Complex System-on-Chip Multiprocessor Design.
DAC 1999: 420-424 |