Vicente Herrero

	2009
3		Ramón José Aliaga, Rafael Gadea Gironés, Ricardo José Colom-Palero, Joaquín Cerdá, Néstor Ferrando, Vicente Herrero: A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA. ICSAMOS 2009: 1-8
	2003
2		Joaquín Cerdá, Rafael Gadea Gironés, Vicente Herrero, Angel Sebastia: On the Implementation of a Margolus Neighborhood Cellular Automata on FPGA. FPL 2003: 776-785
	2000
1		Rafael Gadea Gironés, Vicente Herrero, Angel Sebastia, Antonio Mocholí Salcedo: The Role of the Embedded Memories in the Implementation of Artificial Neural Networks. FPL 2000: 785-788

Coauthor Index

1	Ramón José Aliaga	[3]
2	Joaquín Cerdá	[2] [3]
3	Ricardo José Colom-Palero	[3]
4	Néstor Ferrando	[3]
5	Rafael Gadea Gironés	[1] [2] [3]
6	Antonio Mocholí Salcedo	[1]
7	Angel Sebastia	[1] [2]

Last update Fri Jun 1 15:44:53 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page