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| 2012 | ||
|---|---|---|
| 158 | Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe: Invasive manycore architectures. ASP-DAC 2012: 193-200 | |
| 157 | Semeen Rehman, Muhammad Shafique, Florian Kriebel, Jörg Henkel: RAISE: Reliability-Aware Instruction SchEduling for unreliable hardware. ASP-DAC 2012: 671-676 | |
| 156 | Semeen Rehman, Muhammad Shafique, Jörg Henkel: Instruction scheduling for reliability-aware compilation. DAC 2012: 1292-1300 | |
| 155 | Muhammad Shafique, Bruno Zatt, Fabio Leandro Walter, Sergio Bampi, Jörg Henkel: Adaptive power management of on-chip video memory for multiview video coding. DAC 2012: 866-875 | |
| 154 | Artjom Grudnitsky, Lars Bauer, Jörg Henkel: Partial online-synthesis for mixed-grained reconfigurable architectures. DATE 2012: 1555-1560 | |
| 153 | Zhonglei Wang, Jörg Henkel: Accurate source-level simulation of embedded software with respect to compiler optimizations. DATE 2012: 382-387 | |
| 152 | Fazal Hameed, Lars Bauer, Jörg Henkel: Dynamic cache management in multi-core architectures through run-time adaptation. DATE 2012: 485-490 | |
| 151 | Muhammad Shafique, Bruno Zatt, Semeen Rehman, Florian Kriebel, Jörg Henkel: Power-efficient error-resiliency for H.264/AVC Context-Adaptive Variable Length Coding. DATE 2012: 697-702 | |
| 150 | Mohammad Abdullah Al Faruque, Thomas Ebi, Jörg Henkel: AdNoC: Runtime Adaptive Network-on-Chip Architecture. IEEE Trans. VLSI Syst. 20(2): 257-269 (2012) | |
| 2011 | ||
| 149 | Lars Bauer, Jörg Henkel: Run-time Adaptation for Reconfigurable Embedded Processors. Springer 2011: I-XXI, 1-223 | |
| 148 | Sebastian Kobbe, Lars Bauer, Daniel Lohmann, Wolfgang Schröder-Preikschat, Jörg Henkel: DistRM: distributed resource management for on-chip many-core systems. CODES+ISSS 2011: 119-128 | |
| 147 | Thomas Ebi, David Kramer, Wolfgang Karl, Jörg Henkel: Economic learning for thermal-aware power budgeting in many-core architectures. CODES+ISSS 2011: 189-196 | |
| 146 | Semeen Rehman, Muhammad Shafique, Florian Kriebel, Jörg Henkel: Reliable software for unreliable hardware: embedded code generation aiming at reliability. CODES+ISSS 2011: 237-246 | |
| 145 | Waheed Ahmed, Muhammad Shafique, Lars Bauer, Jörg Henkel: Adaptive resource management for simultaneous multitasking in mixed-grained reconfigurable multi-core processors. CODES+ISSS 2011: 365-374 | |
| 144 | Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich: Design and architectures for dependable embedded systems. CODES+ISSS 2011: 69-78 | |
| 143 | Bruno Zatt, Muhammad Shafique, Felipe Sampaio, Luciano Volcan Agostini, Sergio Bampi, Jörg Henkel: Run-time adaptive energy-aware motion and disparity estimation in multiview video coding. DAC 2011: 1026-1031 | |
| 142 | Haris Javaid, Muhammad Shafique, Sri Parameswaran, Jörg Henkel: Low-power adaptive pipelined MPSoCs for multimedia: an H.264 video encoder case study. DAC 2011: 1032-1037 | |
| 141 | Nabeel Iqbal, Muhammad Adnan Siddique, Jörg Henkel: SEAL: soft error aware low power scheduling by Monte Carlo state space under the influence of stochastic spatial and temporal dependencies. DAC 2011: 134-139 | |
| 140 | Muhammad Shafique, Lars Bauer, Waheed Ahmed, Jörg Henkel: Minority-Game-based resource allocation for run-time reconfigurable multi-core processors. DATE 2011: 1261-1266 | |
| 139 | Bruno Zatt, Muhammad Shafique, Sergio Bampi, Jörg Henkel: Multi-level pipelined parallel hardware architecture for high throughput motion and disparity estimation in Multiview Video Coding. DATE 2011: 1448-1453 | |
| 138 | Waheed Ahmed, Muhammad Shafique, Lars Bauer, Jörg Henkel: mRTS: Run-time system for reconfigurable processors with multi-grained instruction-set extensions. DATE 2011: 1554-1559 | |
| 137 | Fazal Hameed, Mohammad Abdullah Al Faruque, Jörg Henkel: Dynamic thermal management in 3D multi-core architecture through run-time adaptation. DATE 2011: 299-304 | |
| 136 | Janmartin Jahn, Mohammad Abdullah Al Faruque, Jörg Henkel: CARAT: Context-aware runtime adaptive task migration for multi core architectures. DATE 2011: 515-520 | |
| 135 | Waheed Ahmed, Muhammad Shafique, Lars Bauer, Manuel Hammerich, Jörg Henkel, Jürgen Becker: Run-Time Resource Allocation for Simultaneous Multi-tasking in Multi-core Reconfigurable Processors. FCCM 2011: 29-32 | |
| 134 | Bruno Zatt, Muhammad Shafique, Sergio Bampi, Jörg Henkel: A low-power memory architecture with application-aware power management for motion & disparity estimation in Multiview Video Coding. ICCAD 2011: 40-47 | |
| 133 | Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran: System-level application-aware dynamic power management in adaptive pipelined MPSoCs for multimedia. ICCAD 2011: 616-623 | |
| 132 | Muhammad Shafique, Adnan Orcun Tüfek, Jörg Henkel: A high-throughput parallel hardware architecture for H.264/AVC CAVLC encoding. ICIP 2011: 393-396 | |
| 131 | Semeen Rehman, Muhammad Shafique, Florian Kriebel, Jörg Henkel: Revc: Computationally Reliable Video Coding on unreliable hardware platforms: A case study on error-tolerant H.264/AVC CAVLC entropy coding. ICIP 2011: 397-400 | |
| 130 | Bruno Zatt, Muhammad Shafique, Sergio Bampi, Jörg Henkel: A multi-level dynamic complexity reduction scheme for multiview video coding. ICIP 2011: 749-752 | |
| 129 | M. Sammer Srouji, Zhonglei Wang, Jörg Henkel: RDTS: A Reliable Erasure-Coding Based Data Transfer Scheme for Wireless Sensor Networks. ICPADS 2011: 481-488 | |
| 128 | Waqaas Munawar, Janmartin Jahn, Artiom Aleinikov, Jian-Jia Chen, Jörg Henkel: An Empirical Feedback Provider for Multi Core Schedulers. MARC Symposium 2011: 69-70 | |
| 127 | Thomas Ebi, Holm Rauchfuss, Andreas Herkersdorf, Jörg Henkel: Agent-Based Thermal Management Using Real-Time I/O Communication Relocation for 3D Many-Cores. PATMOS 2011: 112-121 | |
| 126 | Michael Hübner, C. Tradowsky, Diana Göhringer, Lars Braun, Florian Thoma, Jörg Henkel, Jürgen Becker: Dynamic Processor Reconfiguration. ReConFig 2011: 123-128 | |
| 125 | Jürgen Teich, Jörg Henkel, Andreas Herkersdorf, Doris Schmitt-Landsiedel, Wolfgang Schröder-Preikschat, Gregor Snelting: Invasive Computing: An Overview. Multiprocessor System-on-Chip 2011: 241-268 | |
| 124 | Thomas Ebi, David Kramer, Christian Schuck, Alexander von Renteln, Jürgen Becker, Uwe Brinkschulte, Jörg Henkel, Wolfgang Karl: DodOrg - A Self-adaptive Organic Many-core Architecture. Organic Computing 2011: 353-368 | |
| 123 | Thomas Ebi, Janmartin Jahn, Jörg Henkel: Agent-Based Thermal Management for Multi-core Architectures. Organic Computing 2011: 587-588 | |
| 2010 | ||
| 122 | Thomas Ebi, Mohammad Abdullah Al Faruque, Jörg Henkel: NeuroNoC: neural network inspired runtime adaptation for an on-chip communication architecture. CODES+ISSS 2010: 223-230 | |
| 121 | Nabeel Iqbal, M. A. Siddique, Jörg Henkel: DAGS: Distribution agnostic sequential Monte Carlo scheme for task execution time estimation. DATE 2010: 1645-1648 | |
| 120 | Muhammad Shafique, Bastian Molkenthin, Jörg Henkel: An HVS-based Adaptive Computational Complexity Reduction Scheme for H.264/AVC video encoder using Prognostic Early Mode Exclusion. DATE 2010: 1713-1718 | |
| 119 | Muhammad Shafique, Lars Bauer, Jörg Henkel: enBudget: A Run-Time Adaptive Predictive Energy-Budgeting scheme for energy-aware Motion Estimation in H.264/MPEG-4 AVC video encoder. DATE 2010: 1725-1730 | |
| 118 | Ralf König, Lars Bauer, Timo Stripf, Muhammad Shafique, Waheed Ahmed, Jürgen Becker, Jörg Henkel: KAHRISMA: A novel Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array architecture. DATE 2010: 819-824 | |
| 117 | Nabeel Iqbal, M. A. Siddique, Jörg Henkel: RMOT: Recursion in model order for task execution time estimation in a software pipeline. DATE 2010: 953-956 | |
| 116 | Naehyuck Chang, Jörg Henkel, Andy D. Pimentel, Petru Eles: Message from the chairs. ESTImedia 2010 | |
| 115 | Nabeel Iqbal, Jörg Henkel: SETS: Stochastic execution time scheduling for multicore systems by joint state space and Monte Carlo. ICCAD 2010: 123-130 | |
| 114 | Muhammad Shafique, Lars Bauer, Jörg Henkel: Selective instruction set muting for energy-aware adaptive processors. ICCAD 2010: 353-360 | |
| 113 | Muhammad Shafique, Bruno Zatt, Sergio Bampi, Jörg Henkel: Power-aware complexity-scalable multiview video coding for mobile devices. PCS 2010: 350-353 | |
| 112 | Bruno Zatt, Muhammad Shafique, Sergio Bampi, Jörg Henkel: An adaptive early skip mode decision scheme for multiview video coding. PCS 2010: 42-45 | |
| 111 | Naehyuck Chang, Jörg Henkel: Call for papers ACM transactions on design automation of electronic systems (TODAES) special section on low-power electronics and design. ACM Trans. Design Autom. Electr. Syst. 15(2): (2010) | |
| 110 | Talal Bonny, Jörg Henkel: Huffman-based code compression techniques for embedded processors. ACM Trans. Design Autom. Electr. Syst. 15(4): (2010) | |
| 109 | Naehyuck Chang, Jörg Henkel: Guest Editorial: Current Trends in Low-Power Design. ACM Trans. Design Autom. Electr. Syst. 16(1): 1 (2010) | |
| 108 | Jörg Henkel, Sri Parameswaran: CASES 2009 guest editor's introduction. Design Autom. for Emb. Sys. 14(3): 285-286 (2010) | |
| 107 | Mohammad Abdullah Al Faruque, Janmartin Jahn, Jörg Henkel: Runtime Thermal Management Using Software Agents for Multi- and Many-Core Architectures. IEEE Design & Test of Computers 27(6): 58-68 (2010) | |
| 106 | Muhammad Shafique, Lars Bauer, Jörg Henkel: Optimizing the H.264/AVC Video Encoder Application Structure for Reconfigurable and Application-Specific Platforms. Signal Processing Systems 60(2): 183-210 (2010) | |
| 2009 | ||
| 105 | Jörg Henkel, Sri Parameswaran: Proceedings of the 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2009, Grenoble, France, October 11-16, 2009 ACM 2009 | |
| 104 | Jörg Henkel, Ali Keshavarzi, Naehyuck Chang, Tahir Ghani: Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009 ACM 2009 | |
| 103 | Lars Bauer, Muhammad Shafique, Jörg Henkel: MinDeg: a performance-guided replacement policy for run-time reconfigurable accelerators. CODES+ISSS 2009: 335-342 | |
| 102 | Talal Bonny, Jörg Henkel: LICT: left-uncompressed instructions compression technique to improve the decoding performance of VLIW processors. DAC 2009: 903-906 | |
| 101 | Muhammad Shafique, Lars Bauer, Jörg Henkel: A parallel approach for high performance hardware design of intra prediction in H.264/AVC Video Codec. DATE 2009: 1434-1439 | |
| 100 | Nabeel Iqbal, Jörg Henkel: Efficient constant-time entropy decoding for H.264. DATE 2009: 1440-1445 | |
| 99 | Mohammad Abdullah Al Faruque, Thomas Ebi, Jörg Henkel: Configurable links for runtime adaptive on-chip communication. DATE 2009: 256-261 | |
| 98 | Lars Bauer, Muhammad Shafique, Jörg Henkel: Cross-architectural design space exploration tool for reconfigurable processors. DATE 2009: 958-963 | |
| 97 | Lars Bauer, Muhammad Shafique, Jörg Henkel: RISPP: A run-time adaptive reconfigurable embedded processor. FPL 2009: 725-726 | |
| 96 | Thomas Ebi, Mohammad Abdullah Al Faruque, Jörg Henkel: TAPE: Thermal-aware agent-based power econom multi/many-core architectures. ICCAD 2009: 302-309 | |
| 95 | Muhammad Shafique, Lars Bauer, Jörg Henkel: REMiS: Run-time energy minimization scheme in a reconfigurable processor with dynamic power-gated instruction set. ICCAD 2009: 55-62 | |
| 94 | Muhammad Shafique, Bastian Molkenthin, Jörg Henkel: Non-linear rate control for H.264/AVC video encoder with multiple picture types using image-statistics and motion-based Macroblock Prioritization. ICIP 2009: 3429-3432 | |
| 93 | Jörg Henkel, Vijaykrishnan Narayanan, Sri Parameswaran, Roshan G. Ragel: Security and Dependability of Embedded Systems: A Computer Architects' Perspective. VLSI Design 2009: 30-32 | |
| 2008 | ||
| 92 | Vijaykrishnan Narayanan, C. P. Ravikumar, Jörg Henkel, Ali Keshavarzi, Vojin G. Oklobdzija, Barry M. Pangrle: Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008, Bangalore, India, August 11-13, 2008 ACM 2008 | |
| 91 | Dominic Hillenbrand, Jörg Henkel: Block cache for embedded systems. ASP-DAC 2008: 322-327 | |
| 90 | Lars Bauer, Muhammad Shafique, Jörg Henkel: Run-time instruction set selection in a transmutable embedded processor. DAC 2008: 56-61 | |
| 89 | Mohammad Abdullah Al Faruque, Rudolf Krist, Jörg Henkel: ADAM: run-time agent-based distributed application mapping for on-chip communication. DAC 2008: 760-765 | |
| 88 | Mohammad Abdullah Al Faruque, Jörg Henkel: Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures. DATE 2008: 1238-1243 | |
| 87 | Lars Bauer, Muhammad Shafique, Stephanie Kreutz, Jörg Henkel: Run-time System for an Extensible Embedded Processor with Dynamic Instruction Set. DATE 2008: 752-757 | |
| 86 | Talal Bonny, Jörg Henkel: Instruction Re-encoding Facilitating Dense Embedded Code. DATE 2008: 770-775 | |
| 85 | Lars Bauer, Muhammad Shafique, Jörg Henkel: A computation- and communication- infrastructure for modular special instructions in a dynamically reconfigurable processor. FPL 2008: 203-208 | |
| 84 | Mohammad Abdullah Al Faruque, Thomas Ebi, Jörg Henkel: ROAdNoC: runtime observability for an adaptive network on chip architecture. ICCAD 2008: 543-548 | |
| 83 | Talal Bonny, Jörg Henkel: FBT: filled buffer technique to reduce code size for VLIW processors. ICCAD 2008: 549-554 | |
| 82 | Muhammad Shafique, Lars Bauer, Jörg Henkel: 3-tier dynamically adaptive power-aware motion estimator for h.264/AVC video encoding. ISLPED 2008: 147-152 | |
| 81 | Dimitrios N. Serpanos, Jörg Henkel: Dependability and Security Will Change Embedded Computing. IEEE Computer 41(1): 103-105 (2008) | |
| 80 | Lars Bauer, Muhammad Shafique, Jörg Henkel: Efficient Resource Utilization for an Extensible Processor Through Dynamic Instruction Set Adaptation. IEEE Trans. VLSI Syst. 16(10): 1295-1308 (2008) | |
| 79 | Talal Bonny, Jörg Henkel: Efficient Code Compression for Embedded Processors. IEEE Trans. VLSI Syst. 16(12): 1696-1707 (2008) | |
| 78 | Diana Marculescu, Jörg Henkel: Guest Editorial Special Section on Low-Power Electronics and Design. IEEE Trans. VLSI Syst. 16(6): 609-610 (2008) | |
| 77 | Mohammad Abdullah Al Faruque, Jörg Henkel: QoS-supported On-chip Communication for Multi-processors. International Journal of Parallel Programming 36(1): 114-139 (2008) | |
| 76 | Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel: A Flexible Framework for Communication Evaluation in SoC Design. International Journal of Parallel Programming 36(5): 457-477 (2008) | |
| 2007 | ||
| 75 | Mohammad Abdullah Al Faruque, Jörg Henkel: Transaction Specific Virtual Channel Allocation in QoS Supported On-chip Communication. ASAP 2007: 48-53 | |
| 74 | Talal Bonny, Jörg Henkel: Instruction Splitting for Efficient Code Compression. DAC 2007: 646-651 | |
| 73 | Lars Bauer, Muhammad Shafique, Simon Kramer, Jörg Henkel: RISPP: Rotating Instruction Set Processing Platform. DAC 2007: 791-796 | |
| 72 | Andhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran, Jörg Henkel: Instruction trace compression for rapid instruction cache simulation. DATE 2007: 803-808 | |
| 71 | Talal Bonny, Jörg Henkel: Efficient code density through look-up table compression. DATE 2007: 809-814 | |
| 70 | Muhammad Shafique, Lars Bauer, Jörg Henkel: An Optimized Application Architecture of the H.264 Video Encoder for Application Specific Platforms. ESTImedia 2007: 119-124 | |
| 69 | Mohammad Abdullah Al Faruque, Thomas Ebi, Jörg Henkel: Run-time adaptive on-chip communication scheme. ICCAD 2007: 26-31 | |
| 68 | Lars Bauer, Muhammad Shafique, Dirk Teufel, Jörg Henkel: A Self-Adaptive Extensible Embedded Processor. SASO 2007: 344-350 | |
| 2006 | ||
| 67 | Wolfgang Nebel, Mircea R. Stan, Anand Raghunathan, Jörg Henkel, Diana Marculescu: Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006 ACM 2006 | |
| 66 | Talal Bonny, Jörg Henkel: Using Lin-Kernighan algorithm for look-up table compression to improve code density. ACM Great Lakes Symposium on VLSI 2006: 259-265 | |
| 65 | Jürgen Becker, Kurt Brändle, Uwe Brinkschulte, Jörg Henkel, Wolfgang Karl, Thorsten Köster, Michael Wenz, Heinz Wörn: Digital On-Demand Computing Organism for Real-Time Systems. ARCS Workshops 2006: 230-245 | |
| 64 | Mohammad Abdullah Al Faruque, Gereon Weiss, Jörg Henkel: Bounded arbitration algorithm for QoS-supported on-chip communication. CODES+ISSS 2006: 76-81 | |
| 63 | Haris Lekatsas, Jörg Henkel, Venkata Jakkula, Srimat T. Chakradhar: Using Shiftable Content Addressable Memories to Double Memory Capacity on Embedded Systems. VLSI Design 2006: 639-644 | |
| 62 | Jiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar: A design methodology for application-specific networks-on-chip. ACM Trans. Embedded Comput. Syst. 5(2): 263-280 (2006) | |
| 61 | Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel: Distance-based recent use (DRU): an enhancement to instruction cache replacement policies for transition energy reduction. IEEE Trans. VLSI Syst. 14(1): 69-80 (2006) | |
| 2005 | ||
| 60 | Newton Cheung, Sri Parameswaran, Jörg Henkel: Battery-aware instruction generation for embedded processors. ASP-DAC 2005: 553-556 | |
| 59 | Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel: A flexible framework for communication evaluation in SoC design. ASP-DAC 2005: 956-959 | |
| 58 | Jiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar: H.264 HDTV Decoder Using Application-Specific Networks-On-Chip. ICME 2005: 1508-1511 | |
| 57 | Jiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar: A methodology for design, modeling, and analysis of networks-on-chip. ISCAS (2) 2005: 1778-1781 | |
| 56 | Haris Lekatsas, Jörg Henkel, Venkata Jakkula, Srimat T. Chakradhar: A Unified Architecture for Adaptive Compression of Data and Code on Embedded Systems. VLSI Design 2005: 117-123 | |
| 55 | Tiehan Lv, Jiang Xu, Wayne Wolf, Burak Ozer, Jörg Henkel, Srimat T. Chakradhar: A Methodology for Architectural Design of Multimedia Multiprocessor SoCs. IEEE Design & Test of Computers 22(1): 18-26 (2005) | |
| 54 | Sri Parameswaran, Jörg Henkel: Instruction code mapping for performance increase and energy reduction in embedded computer systems. IEEE Trans. VLSI Syst. 13(4): 498-502 (2005) | |
| 53 | Haris Lekatsas, Jörg Henkel, Wayne Wolf: Approximate arithmetic coding for bus transition reduction in low power designs. IEEE Trans. VLSI Syst. 13(6): 696-707 (2005) | |
| 2004 | ||
| 52 | Newton Cheung, Sri Parameswaran, Jörg Henkel, Jeremy Chan: MINCE: Matching INstructions Using Combinational Equivalence for Extensible Processor. DATE 2004: 1020-1027 | |
| 51 | Radu Marculescu, Massoud Pedram, Jörg Henkel: Distributed Multimedia System Design: A Holistic Perspective. DATE 2004: 1342-1349 | |
| 50 | Jiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar, Tiehan Lv: A Case Study in Networks-on-Chip Design for Embedded Video. DATE 2004: 770-777 | |
| 49 | Newton Cheung, Sri Parameswaran, Jörg Henkel: A quantitative study and estimation models for extensible instructions in embedded processors. ICCAD 2004: 183-189 | |
| 48 | Jörg Henkel, Wayne Wolf, Srimat T. Chakradhar: On-chip networks: A scalable, communication-centric embedded system design paradigm. VLSI Design 2004: 845- | |
| 47 | Haris Lekatsas, Jörg Henkel, Srimat T. Chakradhar, Venkata Jakkula: Cypress: Compression and Encryption of Data and Code for Embedded Multimedia Systems. IEEE Design & Test of Computers 21(5): 406-415 (2004) | |
| 2003 | ||
| 46 | Haris Lekatsas, Jörg Henkel, Srimat T. Chakradhar, Venkata Jakkula, Murugan Sankaradass: CoCo: a hardware/software platform for rapid prototyping of code compression technologies. DAC 2003: 306-311 | |
| 45 | Tiehan Lv, Jörg Henkel, Haris Lekatsas, Wayne Wolf: Enhancing Signal Integrity through a Low-Overhead Encoding Scheme on Address Buses. DATE 2003: 10542-10549 | |
| 44 | Newton Cheung, Jörg Henkel, Sri Parameswaran: Rapid Configuration and Instruction Selection for an ASIP: A Case Study. DATE 2003: 10802-10809 | |
| 43 | Newton Cheung, Sri Parameswaran, Jörg Henkel: INSIDE: INstruction Selection/Identification & Design Exploration for Extensible Processors. ICCAD 2003: 291-298 | |
| 42 | Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel: LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction Caches. ICCAD 2003: 518-522 | |
| 41 | Ramesh Chandra, Preeti Ranjan Panda, Jörg Henkel, Sri Parameswaran, Loganath Ramachandran: Specification and Design of Multi-Million Gate SOCs. VLSI Design 2003: 18-19 | |
| 40 | Fabrice Kordon, Jörg Henkel: An Overview of Rapid System Prototyping Today. Design Autom. for Emb. Sys. 8(4): 275-282 (2003) | |
| 39 | Jörg Henkel, Xiaobo Hu, Shuvra S. Bhattacharyya: Guest Editors' Introduction: Taking on the Embedded System Design Challenge. IEEE Computer 36(4): 35-37 (2003) | |
| 38 | Jörg Henkel: Closing the SoC Design Gap. IEEE Computer 36(9): 119-121 (2003) | |
| 37 | Tiehan Lv, Jörg Henkel, Haris Lekatsas, Wayne Wolf: A dictionary-based en/decoding scheme for low-power data buses. IEEE Trans. VLSI Syst. 11(5): 943-951 (2003) | |
| 2002 | ||
| 36 | Jörg Henkel, Xiaobo Sharon Hu, Rajesh Gupta, Sri Parameswaran: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002 ACM 2002 | |
| 35 | Haris Lekatsas, Jörg Henkel, Venkata Jakkula: Design of an one-cycle decompression hardware for performance increase in embedded systems. DAC 2002: 34-39 | |
| 34 | Tiehan Lv, Wayne Wolf, Jörg Henkel, Haris Lekatsas: An Adaptive Dictionary Encoding Scheme for SOC Data Buses. DATE 2002: 1059-1064 | |
| 33 | Tin-Man Lee, Wayne Wolf, Jörg Henkel: Dynamic Runtime Re-Scheduling Allowing Multiple Implementations of a Task for Platform-Based Designs. DATE 2002: 296-301 | |
| 32 | Haris Lekatsas, Jörg Henkel: ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs. VLSI Design 2002: 113-120 | |
| 31 | Tony Givargis, Frank Vahid, Jörg Henkel: System-level exploration for Pareto-optimal configurations in parameterized system-on-a-chip. IEEE Trans. VLSI Syst. 10(4): 416-422 (2002) | |
| 30 | Jörg Henkel, Yanbing Li: Avalanche: an environment for design space exploration and optimization of low-power embedded systems. IEEE Trans. VLSI Syst. 10(4): 454-468 (2002) | |
| 29 | Tony Givargis, Frank Vahid, Jörg Henkel: Instruction-based system-level power evaluation of system-on-a-chip peripheral cores. IEEE Trans. VLSI Syst. 10(6): 856-863 (2002) | |
| 2001 | ||
| 28 | Jan Madsen, Jörg Henkel, Xiaobo Sharon Hu: Proceedings of the Ninth International Symposium on Hardware/Software Codesign, CODES 2001, Copenhagen, Denmark, 2001 ACM 2001 | |
| 27 | Tony Givargis, Frank Vahid, Jörg Henkel: Trace-driven system-level power evaluation of system-on-a-chip peripheral cores. ASP-DAC 2001: 306-312 | |
| 26 | Jörg Henkel, Haris Lekatsas: A2BC: Adaptive Address Bus Coding for Low Power Deep Sub-Micron Designs. DAC 2001: 744-749 | |
| 25 | Tony Givargis, Frank Vahid, Jörg Henkel: System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip. ICCAD 2001: 25-30 | |
| 24 | Sri Parameswaran, Jörg Henkel: I-CoPES: Fast Instruction Code Placement for Embedded Systems to Improve Performance and Energy Efficiency. ICCAD 2001: 635- | |
| 23 | Haris Lekatsas, Jörg Henkel, Wayne Wolf: Design and simulation of a pipelined decompression architecture for embedded systems. ISSS 2001: 63-68 | |
| 22 | Jörg Henkel, Rolf Ernst: An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques. IEEE Trans. VLSI Syst. 9(2): 273-289 (2001) | |
| 21 | Tony Givargis, Frank Vahid, Jörg Henkel: Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs. IEEE Trans. VLSI Syst. 9(4): 500-508 (2001) | |
| 2000 | ||
| 20 | Tony Givargis, Frank Vahid, Jörg Henkel: A hybrid approach for core-based system-level power modeling. ASP-DAC 2000: 141-146 | |
| 19 | Haris Lekatsas, Jörg Henkel, Wayne Wolf: Code compression as a variable in hardware/software co-design. CODES 2000: 120-124 | |
| 18 | Haris Lekatsas, Jörg Henkel, Wayne Wolf: Code compression for low power embedded system design. DAC 2000: 294-299 | |
| 17 | Jörg Henkel, Tony Givargis, Frank Vahid: Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design. DATE 2000: 333-338 | |
| 16 | Haris Lekatsas, Wayne Wolf, Jörg Henkel: Arithmetic Coding for Low Power Embedded System Design. Data Compression Conference 2000: 430-439 | |
| 15 | Haris Lekatsas, Jörg Henkel, Wayne Wolf: A Decompression Architecture for Low Power Embedded Systems. ICCD 2000: 571-574 | |
| 14 | Tony Givargis, Frank Vahid, Jörg Henkel: Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral Cores. ISSS 2000: 163-171 | |
| 1999 | ||
| 13 | Jörg Henkel: A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded Systems. DAC 1999: 122-127 | |
| 12 | Jörg Henkel: A Methodology for Minimizing Power Dissipation of Embedded Systems through Hardware/Software Partitioning. Great Lakes Symposium on VLSI 1999: 86- | |
| 11 | Tony Givargis, Jörg Henkel, Frank Vahid: Interface and cache power exploration for core-based embedded system design. ICCAD 1999: 270-273 | |
| 1998 | ||
| 10 | Jörg Henkel, Rolf Ernst: High-Level Estimation Techniques for Usage in Hardware/Software Co-Design. ASP-DAC 1998: 353-360 | |
| 9 | Jörg Henkel, Yanbing Li: Energy-conscious HW/SW-partitioning of embedded systems: a case study on an MPEG-2 encoder. CODES 1998: 23-27 | |
| 8 | Yanbing Li, Jörg Henkel: A Framework for Estimation and Minimizing Energy Dissipation of Embedded HW/SW Systems. DAC 1998: 188-193 | |
| 1997 | ||
| 7 | Jörg Henkel, Rolf Ernst: A Hardware/Software Partitioner Using a Dynamically Determined Granularity. DAC 1997: 691-696 | |
| 1996 | ||
| 6 | Jörg Henkel, Rolf Ernst: The Interplay of Run-Time Estimation and Granularity in HW/SW Partitioning. CODES 1996: 52-61 | |
| 1995 | ||
| 5 | Jörg Henkel, Rolf Ernst: A path-based technique for estimating hardware runtime in HW/SW-cosynthesis. ISSS 1995: 116-121 | |
| 1994 | ||
| 4 | Dirk Herrmann, Jörg Henkel, Rolf Ernst: An approach to the adaptation of estimated cost parameters in the COSYMA system. CODES 1994: 100-107 | |
| 3 | Jörg Henkel, Rolf Ernst, Ulrich Holtmann, Thomas Benner: Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis. ICCAD 1994: 96-100 | |
| 1993 | ||
| 2 | W. Ye, Rolf Ernst, Thomas Benner, Jörg Henkel: Fast Timing Analysis for Hardware-Software Co-Synthesis. ICCD 1993: 452-457 | |
| 1 | Rolf Ernst, Jörg Henkel, Thomas Benner: Hardware-Software Cosynthesis for Microcontrollers. IEEE Design & Test of Computers 10(4): 64-75 (1993) | |
Colors in the list of coauthors
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